Merge pull request #4760 from lioncash/regcache
DSPJitRegCache: Move allocation order array to the cpp file
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commit
764d2abae3
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@ -23,7 +23,7 @@ namespace x86
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{
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{
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// Ordered in order of prefered use.
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// Ordered in order of prefered use.
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// Not all of these are actually available
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// Not all of these are actually available
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const std::array<X64Reg, 15> DSPJitRegCache::m_allocation_order = {
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constexpr std::array<X64Reg, 15> s_allocation_order = {
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{R8, R9, R10, R11, R12, R13, R14, R15, RSI, RDI, RBX, RCX, RDX, RAX, RBP}};
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{R8, R9, R10, R11, R12, R13, R14, R15, RSI, RDI, RBX, RCX, RDX, RAX, RBP}};
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static void* GetRegisterPointer(size_t reg)
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static void* GetRegisterPointer(size_t reg)
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@ -905,7 +905,7 @@ X64Reg DSPJitRegCache::SpillXReg()
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{
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{
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int max_use_ctr_diff = 0;
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int max_use_ctr_diff = 0;
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X64Reg least_recent_use_reg = INVALID_REG;
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X64Reg least_recent_use_reg = INVALID_REG;
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for (X64Reg reg : m_allocation_order)
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for (X64Reg reg : s_allocation_order)
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{
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{
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if (m_xregs[reg].guest_reg <= DSP_REG_MAX_MEM_BACKED && !m_regs[m_xregs[reg].guest_reg].used)
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if (m_xregs[reg].guest_reg <= DSP_REG_MAX_MEM_BACKED && !m_regs[m_xregs[reg].guest_reg].used)
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{
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{
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@ -925,7 +925,7 @@ X64Reg DSPJitRegCache::SpillXReg()
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}
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}
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// just choose one.
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// just choose one.
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for (X64Reg reg : m_allocation_order)
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for (X64Reg reg : s_allocation_order)
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{
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{
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if (m_xregs[reg].guest_reg <= DSP_REG_MAX_MEM_BACKED && !m_regs[m_xregs[reg].guest_reg].used)
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if (m_xregs[reg].guest_reg <= DSP_REG_MAX_MEM_BACKED && !m_regs[m_xregs[reg].guest_reg].used)
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{
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{
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@ -956,7 +956,7 @@ void DSPJitRegCache::SpillXReg(X64Reg reg)
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X64Reg DSPJitRegCache::FindFreeXReg()
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X64Reg DSPJitRegCache::FindFreeXReg()
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{
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{
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for (X64Reg x : m_allocation_order)
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for (X64Reg x : s_allocation_order)
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{
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{
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if (m_xregs[x].guest_reg == DSP_REG_NONE)
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if (m_xregs[x].guest_reg == DSP_REG_NONE)
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{
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{
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@ -174,8 +174,6 @@ private:
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void MovToMemory(size_t reg);
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void MovToMemory(size_t reg);
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void FlushMemBackedRegs();
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void FlushMemBackedRegs();
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static const std::array<Gen::X64Reg, 15> m_allocation_order;
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std::array<DynamicReg, 37> m_regs;
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std::array<DynamicReg, 37> m_regs;
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std::array<X64CachedReg, 16> m_xregs;
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std::array<X64CachedReg, 16> m_xregs;
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