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JITIL: Disable all load/store instructions in 64-bit mode. This actually makes a lot of games work - but slowly. Investigation needed. Reindent a bunch of code. 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3405 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
hrydgard 2009-06-10 19:43:47 +00:00
parent 46f8178ab1
commit 759263351a
10 changed files with 1664 additions and 1639 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
Source/Core/Core/Src/PowerPC/Jit64IL/IR.h
View File

@ -22,7 +22,7 @@
#include <vector>
namespace IREmitter {
enum Opcode {
enum Opcode {
Nop = 0,
// "Zero-operand" operators
@ -168,46 +168,46 @@ namespace IREmitter {
Tramp,
// "Opcode"s representing the start and end
BlockStart, BlockEnd
};
};
typedef unsigned Inst;
typedef Inst* InstLoc;
typedef unsigned Inst;
typedef Inst* InstLoc;
unsigned inline getOpcode(Inst i) {
unsigned inline getOpcode(Inst i) {
return i & 255;
}
}
unsigned inline isImm(Inst i) {
unsigned inline isImm(Inst i) {
return getOpcode(i) >= CInt16 && getOpcode(i) <= CInt32;
}
}
unsigned inline isICmp(Inst i) {
unsigned inline isICmp(Inst i) {
return getOpcode(i) >= ICmpEq && getOpcode(i) <= ICmpSle;
}
}
unsigned inline isFResult(Inst i) {
unsigned inline isFResult(Inst i) {
return getOpcode(i) > FResult_Start &&
getOpcode(i) < FResult_End;
}
}
InstLoc inline getOp1(InstLoc i) {
InstLoc inline getOp1(InstLoc i) {
i = i - 1 - ((*i >> 8) & 255);
if (getOpcode(*i) == Tramp) {
i = i - 1 - (*i >> 8);
}
return i;
}
}
InstLoc inline getOp2(InstLoc i) {
InstLoc inline getOp2(InstLoc i) {
i = i - 1 - ((*i >> 16) & 255);
if (getOpcode(*i) == Tramp) {
i = i - 1 - (*i >> 8);
}
return i;
}
}
class IRBuilder {
private:
class IRBuilder {
private:
InstLoc EmitZeroOp(unsigned Opcode, unsigned extra);
InstLoc EmitUOp(unsigned OpCode, InstLoc Op1,
unsigned extra = 0);
@ -239,7 +239,7 @@ namespace IREmitter {
unsigned ComputeKnownZeroBits(InstLoc I);
public:
public:
InstLoc EmitIntConst(unsigned value);
InstLoc EmitStoreLink(InstLoc val) {
return FoldUOp(StoreLink, val);
@ -533,7 +533,7 @@ namespace IREmitter {
IRBuilder() { Reset(); }
private:
private:
IRBuilder(IRBuilder&); // DO NOT IMPLEMENT
std::vector<Inst> InstList; // FIXME: We must ensure this is
// continuous!
@ -549,7 +549,7 @@ namespace IREmitter {
InstLoc CTRCacheStore;
InstLoc CRCache[8];
InstLoc CRCacheStore[8];
};
};
};

126
Source/Core/Core/Src/PowerPC/Jit64IL/Jit.cpp
View File

@ -170,13 +170,13 @@ namespace CPUCompare
extern u32 m_BlockStart;
}
void Jit(u32 em_address)
{
void Jit(u32 em_address)
{
jit.Jit(em_address);
}
}
void Jit64::Init()
{
void Jit64::Init()
{
asm_routines.compareEnabled = ::Core::g_CoreStartupParameter.bRunCompareClient;
if (Core::g_CoreStartupParameter.bJITUnlimitedCache)
CODE_SIZE = 1024*1024*8*8;
@ -206,27 +206,27 @@ namespace CPUCompare
blocks.Init();
asm_routines.Init();
}
}
void Jit64::ClearCache()
{
void Jit64::ClearCache()
{
blocks.Clear();
trampolines.ClearCodeSpace();
ClearCodeSpace();
}
}
void Jit64::Shutdown()
{
void Jit64::Shutdown()
{
FreeCodeSpace();
blocks.Shutdown();
trampolines.Shutdown();
asm_routines.Shutdown();
}
}
void Jit64::WriteCallInterpreter(UGeckoInstruction inst)
{
void Jit64::WriteCallInterpreter(UGeckoInstruction inst)
{
gpr.Flush(FLUSH_ALL);
fpr.Flush(FLUSH_ALL);
if (js.isLastInstruction)
@ -241,50 +241,50 @@ namespace CPUCompare
MOV(32, R(EAX), M(&NPC));
WriteRfiExitDestInEAX();
}
}
}
void Jit64::unknown_instruction(UGeckoInstruction inst)
{
void Jit64::unknown_instruction(UGeckoInstruction inst)
{
// CCPU::Break();
PanicAlert("unknown_instruction %08x - Fix me ;)", inst.hex);
}
}
void Jit64::Default(UGeckoInstruction _inst)
{
void Jit64::Default(UGeckoInstruction _inst)
{
ibuild.EmitInterpreterFallback(
ibuild.EmitIntConst(_inst.hex),
ibuild.EmitIntConst(js.compilerPC));
}
}
void Jit64::HLEFunction(UGeckoInstruction _inst)
{
void Jit64::HLEFunction(UGeckoInstruction _inst)
{
gpr.Flush(FLUSH_ALL);
fpr.Flush(FLUSH_ALL);
ABI_CallFunctionCC((void*)&HLE::Execute, js.compilerPC, _inst.hex);
MOV(32, R(EAX), M(&NPC));
WriteExitDestInEAX(0);
}
}
void Jit64::DoNothing(UGeckoInstruction _inst)
{
void Jit64::DoNothing(UGeckoInstruction _inst)
{
// Yup, just don't do anything.
}
}
void Jit64::NotifyBreakpoint(u32 em_address, bool set)
{
void Jit64::NotifyBreakpoint(u32 em_address, bool set)
{
int block_num = blocks.GetBlockNumberFromStartAddress(em_address);
if (block_num >= 0)
{
blocks.DestroyBlock(block_num, false);
}
}
}
static const bool ImHereDebug = false;
static const bool ImHereLog = false;
static std::map<u32, int> been_here;
static const bool ImHereDebug = false;
static const bool ImHereLog = false;
static std::map<u32, int> been_here;
void ImHere()
{
void ImHere()
{
static FILE *f = 0;
if (ImHereLog) {
if (!f)
@ -305,16 +305,16 @@ namespace CPUCompare
DEBUG_LOG(DYNA_REC, "I'm here - PC = %08x , LR = %08x", PC, LR);
// printf("I'm here - PC = %08x , LR = %08x", PC, LR);
been_here[PC] = 1;
}
}
void Jit64::Cleanup()
{
void Jit64::Cleanup()
{
if (jo.optimizeGatherPipe && js.fifoBytesThisBlock > 0)
ABI_CallFunction((void *)&GPFifo::CheckGatherPipe);
}
}
void Jit64::WriteExit(u32 destination, int exit_num)
{
void Jit64::WriteExit(u32 destination, int exit_num)
{
Cleanup();
SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
@ -336,41 +336,41 @@ namespace CPUCompare
MOV(32, M(&PC), Imm32(destination));
JMP(asm_routines.dispatcher, true);
}
}
}
void Jit64::WriteExitDestInEAX(int exit_num)
{
void Jit64::WriteExitDestInEAX(int exit_num)
{
MOV(32, M(&PC), R(EAX));
Cleanup();
SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
JMP(asm_routines.dispatcher, true);
}
}
void Jit64::WriteRfiExitDestInEAX()
{
void Jit64::WriteRfiExitDestInEAX()
{
MOV(32, M(&PC), R(EAX));
Cleanup();
SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
JMP(asm_routines.testExceptions, true);
}
}
void Jit64::WriteExceptionExit(u32 exception)
{
void Jit64::WriteExceptionExit(u32 exception)
{
Cleanup();
OR(32, M(&PowerPC::ppcState.Exceptions), Imm32(exception));
MOV(32, M(&PC), Imm32(js.compilerPC + 4));
JMP(asm_routines.testExceptions, true);
}
}
void STACKALIGN Jit64::Run()
{
void STACKALIGN Jit64::Run()
{
CompiledCode pExecAddr = (CompiledCode)asm_routines.enterCode;
pExecAddr();
//Will return when PowerPC::state changes
}
}
void Jit64::SingleStep()
{
void Jit64::SingleStep()
{
// NOT USED, NOT TESTED, PROBABLY NOT WORKING YET
// PanicAlert("Single");
/*
@ -379,10 +379,10 @@ namespace CPUCompare
const u8 *code = DoJit(PowerPC::ppcState.pc, &temp_codebuffer, &temp_block);
CompiledCode pExecAddr = (CompiledCode)code;
pExecAddr();*/
}
}
void STACKALIGN Jit64::Jit(u32 em_address)
{
void STACKALIGN Jit64::Jit(u32 em_address)
{
if (GetSpaceLeft() < 0x10000 || blocks.IsFull())
{
INFO_LOG(DYNA_REC, "JIT cache full - clearing.")
@ -396,10 +396,10 @@ namespace CPUCompare
int block_num = blocks.AllocateBlock(em_address);
JitBlock *b = blocks.GetBlock(block_num);
blocks.FinalizeBlock(block_num, jo.enableBlocklink, DoJit(em_address, &code_buffer, b));
}
}
const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buffer, JitBlock *b)
{
const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buffer, JitBlock *b)
{
if (em_address == 0)
PanicAlert("ERROR : Trying to compile at 0. LR=%08x", LR);
@ -480,4 +480,4 @@ namespace CPUCompare
b->codeSize = (u32)(GetCodePtr() - normalEntry);
b->originalSize = size;
return normalEntry;
}
}

8
Source/Core/Core/Src/PowerPC/Jit64IL/Jit.h
View File

@ -71,6 +71,14 @@ struct CONTEXT
Core::g_CoreStartupParameter.bJIT##type##Off) \
{Default(inst); return;}
#ifdef _M_X64
#define DISABLE64 \
{Default(inst); return;}
#else
#define DISABLE64
#endif
class TrampolineCache : public Gen::XCodeBlock
{
public:

41
Source/Core/Core/Src/PowerPC/Jit64IL/Jit_Branch.cpp
View File

@ -45,18 +45,18 @@
using namespace Gen;
void Jit64::sc(UGeckoInstruction inst)
{
void Jit64::sc(UGeckoInstruction inst)
{
ibuild.EmitSystemCall(ibuild.EmitIntConst(js.compilerPC));
}
}
void Jit64::rfi(UGeckoInstruction inst)
{
void Jit64::rfi(UGeckoInstruction inst)
{
ibuild.EmitRFIExit();
}
}
void Jit64::bx(UGeckoInstruction inst)
{
void Jit64::bx(UGeckoInstruction inst)
{
NORMALBRANCH_START
INSTRUCTION_START;
@ -75,9 +75,9 @@ using namespace Gen;
}
ibuild.EmitBranchUncond(ibuild.EmitIntConst(destination));
}
}
static IREmitter::InstLoc TestBranch(IREmitter::IRBuilder& ibuild, UGeckoInstruction inst) {
static IREmitter::InstLoc TestBranch(IREmitter::IRBuilder& ibuild, UGeckoInstruction inst) {
IREmitter::InstLoc CRTest = 0, CTRTest = 0;
if ((inst.BO & 16) == 0) // Test a CR bit
{
@ -112,10 +112,10 @@ using namespace Gen;
Test = ibuild.EmitIntConst(1);
}
return Test;
}
}
void Jit64::bcx(UGeckoInstruction inst)
{
void Jit64::bcx(UGeckoInstruction inst)
{
NORMALBRANCH_START
if (inst.LK)
ibuild.EmitStoreLink(
@ -143,10 +143,10 @@ using namespace Gen;
ibuild.EmitBranchCond(Test, ibuild.EmitIntConst(destination));
}
ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));
}
}
void Jit64::bcctrx(UGeckoInstruction inst)
{
void Jit64::bcctrx(UGeckoInstruction inst)
{
NORMALBRANCH_START
if ((inst.BO & 4) == 0) {
IREmitter::InstLoc c = ibuild.EmitLoadCTR();
@ -172,10 +172,10 @@ using namespace Gen;
if (inst.LK)
ibuild.EmitStoreLink(ibuild.EmitIntConst(js.compilerPC + 4));
ibuild.EmitBranchUncond(destination);
}
}
void Jit64::bclrx(UGeckoInstruction inst)
{
void Jit64::bclrx(UGeckoInstruction inst)
{
NORMALBRANCH_START
if (inst.hex == 0x4e800020) {
ibuild.EmitBranchUncond(ibuild.EmitLoadLink());
@ -190,5 +190,4 @@ using namespace Gen;
if (inst.LK)
ibuild.EmitStoreLink(ibuild.EmitIntConst(js.compilerPC + 4));
ibuild.EmitBranchUncond(destination);
}
}

24
Source/Core/Core/Src/PowerPC/Jit64IL/Jit_FloatingPoint.cpp
View File

@ -28,8 +28,8 @@
//#define INSTRUCTION_START Default(inst); return;
#define INSTRUCTION_START
void Jit64::fp_arith_s(UGeckoInstruction inst)
{
void Jit64::fp_arith_s(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(FloatingPoint)
if (inst.Rc || (inst.SUBOP5 != 25 && inst.SUBOP5 != 20 && inst.SUBOP5 != 21)) {
@ -61,10 +61,10 @@
val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD));
}
ibuild.EmitStoreFReg(val, inst.FD);
}
}
void Jit64::fmaddXX(UGeckoInstruction inst)
{
void Jit64::fmaddXX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(FloatingPoint)
if (inst.Rc) {
@ -86,10 +86,10 @@
val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD));
}
ibuild.EmitStoreFReg(val, inst.FD);
}
}
void Jit64::fmrx(UGeckoInstruction inst)
{
void Jit64::fmrx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(FloatingPoint)
if (inst.Rc) {
@ -98,10 +98,10 @@
IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FB);
val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD));
ibuild.EmitStoreFReg(val, inst.FD);
}
}
void Jit64::fcmpx(UGeckoInstruction inst)
{
void Jit64::fcmpx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(FloatingPoint)
IREmitter::InstLoc lhs, rhs, res;
@ -110,4 +110,4 @@
res = ibuild.EmitFDCmpCR(lhs, rhs);
ibuild.EmitStoreFPRF(res);
ibuild.EmitStoreCR(res, inst.CRFD);
}
}

178
Source/Core/Core/Src/PowerPC/Jit64IL/Jit_Integer.cpp
View File

@ -31,15 +31,15 @@
//#define INSTRUCTION_START Default(inst); return;
#define INSTRUCTION_START
static void ComputeRC(IREmitter::IRBuilder& ibuild,
static void ComputeRC(IREmitter::IRBuilder& ibuild,
IREmitter::InstLoc val) {
IREmitter::InstLoc res =
ibuild.EmitICmpCRSigned(val, ibuild.EmitIntConst(0));
ibuild.EmitStoreCR(res, 0);
}
}
void Jit64::reg_imm(UGeckoInstruction inst)
{
void Jit64::reg_imm(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
int d = inst.RD, a = inst.RA, s = inst.RS;
@ -104,10 +104,10 @@
Default(inst);
break;
}
}
}
void Jit64::cmpXX(UGeckoInstruction inst)
{
void Jit64::cmpXX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc lhs, rhs, res;
@ -128,10 +128,10 @@
}
ibuild.EmitStoreCR(res, inst.CRFD);
}
}
void Jit64::orx(UGeckoInstruction inst)
{
void Jit64::orx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
@ -139,12 +139,12 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
// m_GPR[_inst.RA] = m_GPR[_inst.RS] ^ m_GPR[_inst.RB];
void Jit64::xorx(UGeckoInstruction inst)
{
// m_GPR[_inst.RA] = m_GPR[_inst.RS] ^ m_GPR[_inst.RB];
void Jit64::xorx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
@ -152,10 +152,10 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::andx(UGeckoInstruction inst)
{
void Jit64::andx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
@ -163,10 +163,10 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::extsbx(UGeckoInstruction inst)
{
void Jit64::extsbx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS);
@ -174,10 +174,10 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::extshx(UGeckoInstruction inst)
{
void Jit64::extshx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS);
@ -185,10 +185,10 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::subfic(UGeckoInstruction inst)
{
void Jit64::subfic(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc nota, lhs, val, test;
@ -204,10 +204,10 @@
}
ibuild.EmitStoreGReg(val, inst.RD);
ibuild.EmitStoreCarry(test);
}
}
void Jit64::subfcx(UGeckoInstruction inst)
{
void Jit64::subfcx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
if (inst.OE) PanicAlert("OE: subfcx");
@ -221,10 +221,10 @@
ibuild.EmitStoreCarry(test);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::subfex(UGeckoInstruction inst)
{
void Jit64::subfex(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
if (inst.OE) PanicAlert("OE: subfex");
@ -242,10 +242,10 @@
ibuild.EmitStoreCarry(test);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::subfx(UGeckoInstruction inst)
{
void Jit64::subfx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
if (inst.OE) PanicAlert("OE: subfx");
@ -254,19 +254,19 @@
ibuild.EmitStoreGReg(val, inst.RD);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::mulli(UGeckoInstruction inst)
{
void Jit64::mulli(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA);
val = ibuild.EmitMul(val, ibuild.EmitIntConst(inst.SIMM_16));
ibuild.EmitStoreGReg(val, inst.RD);
}
}
void Jit64::mullwx(UGeckoInstruction inst)
{
void Jit64::mullwx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
@ -274,10 +274,10 @@
ibuild.EmitStoreGReg(val, inst.RD);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::mulhwux(UGeckoInstruction inst)
{
void Jit64::mulhwux(UGeckoInstruction inst)
{
Default(inst); return;
#if 0
if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITIntegerOff)
@ -308,10 +308,10 @@
MOV(32, gpr.R(d), R(EDX));
}
#endif
}
}
// skipped some of the special handling in here - if we get crashes, let the interpreter handle this op
void Jit64::divwux(UGeckoInstruction inst) {
// skipped some of the special handling in here - if we get crashes, let the interpreter handle this op
void Jit64::divwux(UGeckoInstruction inst) {
Default(inst); return;
#if 0
int a = inst.RA, b = inst.RB, d = inst.RD;
@ -333,19 +333,19 @@
CALL((u8*)asm_routines.computeRc);
}
#endif
}
}
u32 Helper_Mask(u8 mb, u8 me)
{
u32 Helper_Mask(u8 mb, u8 me)
{
return (((mb > me) ?
~(((u32)-1 >> mb) ^ ((me >= 31) ? 0 : (u32) -1 >> (me + 1)))
:
(((u32)-1 >> mb) ^ ((me >= 31) ? 0 : (u32) -1 >> (me + 1))))
);
}
}
void Jit64::addx(UGeckoInstruction inst)
{
void Jit64::addx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
@ -353,10 +353,10 @@
ibuild.EmitStoreGReg(val, inst.RD);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::addzex(UGeckoInstruction inst)
{
void Jit64::addzex(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc lhs = ibuild.EmitLoadGReg(inst.RA),
@ -367,10 +367,10 @@
ibuild.EmitStoreCarry(newcarry);
if (inst.Rc)
ComputeRC(ibuild, val);
}
// This can be optimized
void Jit64::addex(UGeckoInstruction inst)
{
}
// This can be optimized
void Jit64::addex(UGeckoInstruction inst)
{
Default(inst); return;
#if 0
// USES_XER
@ -398,10 +398,10 @@
CALL((u8*)asm_routines.computeRc);
}
#endif
}
}
void Jit64::rlwinmx(UGeckoInstruction inst)
{
void Jit64::rlwinmx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
unsigned mask = Helper_Mask(inst.MB, inst.ME);
@ -411,11 +411,11 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::rlwimix(UGeckoInstruction inst)
{
void Jit64::rlwimix(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
unsigned mask = Helper_Mask(inst.MB, inst.ME);
@ -428,10 +428,10 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::rlwnmx(UGeckoInstruction inst)
{
void Jit64::rlwnmx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
unsigned int mask = Helper_Mask(inst.MB, inst.ME);
@ -441,10 +441,10 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::negx(UGeckoInstruction inst)
{
void Jit64::negx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA);
@ -452,10 +452,10 @@
ibuild.EmitStoreGReg(val, inst.RD);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::srwx(UGeckoInstruction inst)
{
void Jit64::srwx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS),
@ -471,10 +471,10 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::slwx(UGeckoInstruction inst)
{
void Jit64::slwx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS),
@ -490,10 +490,10 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
void Jit64::srawx(UGeckoInstruction inst)
{
void Jit64::srawx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
// FIXME: We can do a lot better on 64-bit
@ -513,10 +513,10 @@
test = ibuild.EmitOr(val, mask2);
test = ibuild.EmitICmpUgt(test, mask);
ibuild.EmitStoreCarry(test);
}
}
void Jit64::srawix(UGeckoInstruction inst)
{
void Jit64::srawix(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS), test;
@ -529,11 +529,11 @@
ibuild.EmitStoreCarry(test);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}
// count leading zeroes
void Jit64::cntlzwx(UGeckoInstruction inst)
{
// count leading zeroes
void Jit64::cntlzwx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS);
@ -541,4 +541,4 @@
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
}

10
Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStore.cpp
View File

@ -41,6 +41,7 @@
void Jit64::lhax(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStore)
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB);
if (inst.RA)
@ -53,6 +54,7 @@ void Jit64::lhax(UGeckoInstruction inst)
void Jit64::lXz(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStore)
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
if (inst.RA)
@ -73,6 +75,7 @@ void Jit64::lXz(UGeckoInstruction inst)
void Jit64::lha(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStore)
IREmitter::InstLoc addr =
ibuild.EmitIntConst((s32)(s16)inst.SIMM_16);
@ -86,6 +89,7 @@ void Jit64::lha(UGeckoInstruction inst)
void Jit64::lXzx(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStore)
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB);
if (inst.RA) {
@ -108,6 +112,8 @@ void Jit64::lXzx(UGeckoInstruction inst)
void Jit64::dcbz(UGeckoInstruction inst)
{
Default(inst); return;
// TODO!
#if 0
if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITLoadStoreOff)
{Default(inst); return;} // turn off from debugger
@ -131,6 +137,7 @@ void Jit64::dcbz(UGeckoInstruction inst)
void Jit64::stX(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStore)
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
value = ibuild.EmitLoadGReg(inst.RS);
@ -150,6 +157,7 @@ void Jit64::stX(UGeckoInstruction inst)
void Jit64::stXx(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStore)
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB),
value = ibuild.EmitLoadGReg(inst.RS);
@ -169,6 +177,7 @@ void Jit64::stXx(UGeckoInstruction inst)
void Jit64::lmw(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStore)
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
if (inst.RA)
@ -184,6 +193,7 @@ void Jit64::lmw(UGeckoInstruction inst)
void Jit64::stmw(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStore)
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
if (inst.RA)

6
Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStoreFloating.cpp
View File

@ -45,6 +45,7 @@
void Jit64::lfs(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStoreFloating)
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val;
if (inst.RA)
@ -58,6 +59,7 @@ void Jit64::lfs(UGeckoInstruction inst)
void Jit64::lfd(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStoreFloating)
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val;
if (inst.RA)
@ -72,6 +74,7 @@ void Jit64::lfd(UGeckoInstruction inst)
void Jit64::stfd(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStoreFloating)
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
val = ibuild.EmitLoadFReg(inst.RS);
@ -87,6 +90,7 @@ void Jit64::stfd(UGeckoInstruction inst)
void Jit64::stfs(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStoreFloating)
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
val = ibuild.EmitLoadFReg(inst.RS);
@ -103,6 +107,7 @@ void Jit64::stfs(UGeckoInstruction inst)
void Jit64::stfsx(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStoreFloating)
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB),
val = ibuild.EmitLoadFReg(inst.RS);
@ -117,6 +122,7 @@ void Jit64::stfsx(UGeckoInstruction inst)
void Jit64::lfsx(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStoreFloating)
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), val;
if (inst.RA)

2
Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStorePaired.cpp
View File

@ -44,6 +44,7 @@
void Jit64::psq_st(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStorePaired)
if (inst.W || !Core::GetStartupParameter().bOptimizeQuantizers) {Default(inst); return;}
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val;
@ -59,6 +60,7 @@ void Jit64::psq_st(UGeckoInstruction inst)
void Jit64::psq_l(UGeckoInstruction inst)
{
INSTRUCTION_START
DISABLE64
JITDISABLE(LoadStorePaired)
if (inst.W || !Core::GetStartupParameter().bOptimizeQuantizers) {Default(inst); return;}
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val;

56
Source/Core/Core/Src/PowerPC/Jit64IL/Jit_Paired.cpp
View File

@ -26,28 +26,28 @@
#include "Jit.h"
#include "JitRegCache.h"
void Jit64::ps_mr(UGeckoInstruction inst)
{
void Jit64::ps_mr(UGeckoInstruction inst)
{
Default(inst); return;
}
}
void Jit64::ps_sel(UGeckoInstruction inst)
{
void Jit64::ps_sel(UGeckoInstruction inst)
{
Default(inst); return;
}
}
void Jit64::ps_sign(UGeckoInstruction inst)
{
void Jit64::ps_sign(UGeckoInstruction inst)
{
Default(inst); return;
}
}
void Jit64::ps_rsqrte(UGeckoInstruction inst)
{
void Jit64::ps_rsqrte(UGeckoInstruction inst)
{
Default(inst); return;
}
}
void Jit64::ps_arith(UGeckoInstruction inst)
{
void Jit64::ps_arith(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Paired)
if (inst.Rc || (inst.SUBOP5 != 21 && inst.SUBOP5 != 20 && inst.SUBOP5 != 25)) {
@ -73,10 +73,10 @@
}
val = ibuild.EmitExpandPackedToMReg(val);
ibuild.EmitStoreFReg(val, inst.FD);
}
}
void Jit64::ps_sum(UGeckoInstruction inst)
{
void Jit64::ps_sum(UGeckoInstruction inst)
{
// FIXME: This operation strikes me as a bit strange...
// perhaps we can optimize it depending on the users?
INSTRUCTION_START
@ -93,11 +93,11 @@
val = ibuild.EmitFPMerge11(val, temp);
val = ibuild.EmitExpandPackedToMReg(val);
ibuild.EmitStoreFReg(val, inst.FD);
}
}
void Jit64::ps_muls(UGeckoInstruction inst)
{
void Jit64::ps_muls(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Paired)
if (inst.Rc) {
@ -117,12 +117,12 @@
val = ibuild.EmitFPMul(val, rhs);
val = ibuild.EmitExpandPackedToMReg(val);
ibuild.EmitStoreFReg(val, inst.FD);
}
}
//TODO: find easy cases and optimize them, do a breakout like ps_arith
void Jit64::ps_mergeXX(UGeckoInstruction inst)
{
//TODO: find easy cases and optimize them, do a breakout like ps_arith
void Jit64::ps_mergeXX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Paired)
if (inst.Rc) {
@ -151,11 +151,11 @@
}
val = ibuild.EmitExpandPackedToMReg(val);
ibuild.EmitStoreFReg(val, inst.FD);
}
}
void Jit64::ps_maddXX(UGeckoInstruction inst)
{
void Jit64::ps_maddXX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Paired)
if (inst.Rc) {
@ -215,4 +215,4 @@
}
val = ibuild.EmitExpandPackedToMReg(val);
ibuild.EmitStoreFReg(val, inst.FD);
}
}