JITIL: Disable all load/store instructions in 64-bit mode. This actually makes a lot of games work - but slowly. Investigation needed. Reindent a bunch of code.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3405 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
parent
46f8178ab1
commit
759263351a
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@ -22,7 +22,7 @@
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#include <vector>
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#include <vector>
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namespace IREmitter {
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namespace IREmitter {
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enum Opcode {
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enum Opcode {
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Nop = 0,
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Nop = 0,
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// "Zero-operand" operators
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// "Zero-operand" operators
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@ -168,46 +168,46 @@ namespace IREmitter {
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Tramp,
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Tramp,
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// "Opcode"s representing the start and end
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// "Opcode"s representing the start and end
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BlockStart, BlockEnd
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BlockStart, BlockEnd
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};
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};
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typedef unsigned Inst;
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typedef unsigned Inst;
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typedef Inst* InstLoc;
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typedef Inst* InstLoc;
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unsigned inline getOpcode(Inst i) {
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unsigned inline getOpcode(Inst i) {
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return i & 255;
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return i & 255;
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}
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}
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unsigned inline isImm(Inst i) {
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unsigned inline isImm(Inst i) {
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return getOpcode(i) >= CInt16 && getOpcode(i) <= CInt32;
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return getOpcode(i) >= CInt16 && getOpcode(i) <= CInt32;
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}
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}
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unsigned inline isICmp(Inst i) {
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unsigned inline isICmp(Inst i) {
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return getOpcode(i) >= ICmpEq && getOpcode(i) <= ICmpSle;
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return getOpcode(i) >= ICmpEq && getOpcode(i) <= ICmpSle;
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}
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}
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unsigned inline isFResult(Inst i) {
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unsigned inline isFResult(Inst i) {
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return getOpcode(i) > FResult_Start &&
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return getOpcode(i) > FResult_Start &&
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getOpcode(i) < FResult_End;
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getOpcode(i) < FResult_End;
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}
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}
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InstLoc inline getOp1(InstLoc i) {
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InstLoc inline getOp1(InstLoc i) {
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i = i - 1 - ((*i >> 8) & 255);
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i = i - 1 - ((*i >> 8) & 255);
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if (getOpcode(*i) == Tramp) {
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if (getOpcode(*i) == Tramp) {
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i = i - 1 - (*i >> 8);
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i = i - 1 - (*i >> 8);
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}
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}
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return i;
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return i;
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}
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}
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InstLoc inline getOp2(InstLoc i) {
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InstLoc inline getOp2(InstLoc i) {
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i = i - 1 - ((*i >> 16) & 255);
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i = i - 1 - ((*i >> 16) & 255);
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if (getOpcode(*i) == Tramp) {
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if (getOpcode(*i) == Tramp) {
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i = i - 1 - (*i >> 8);
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i = i - 1 - (*i >> 8);
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}
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}
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return i;
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return i;
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}
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}
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class IRBuilder {
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class IRBuilder {
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private:
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private:
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InstLoc EmitZeroOp(unsigned Opcode, unsigned extra);
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InstLoc EmitZeroOp(unsigned Opcode, unsigned extra);
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InstLoc EmitUOp(unsigned OpCode, InstLoc Op1,
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InstLoc EmitUOp(unsigned OpCode, InstLoc Op1,
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unsigned extra = 0);
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unsigned extra = 0);
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@ -239,7 +239,7 @@ namespace IREmitter {
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unsigned ComputeKnownZeroBits(InstLoc I);
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unsigned ComputeKnownZeroBits(InstLoc I);
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public:
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public:
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InstLoc EmitIntConst(unsigned value);
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InstLoc EmitIntConst(unsigned value);
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InstLoc EmitStoreLink(InstLoc val) {
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InstLoc EmitStoreLink(InstLoc val) {
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return FoldUOp(StoreLink, val);
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return FoldUOp(StoreLink, val);
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@ -533,7 +533,7 @@ namespace IREmitter {
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IRBuilder() { Reset(); }
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IRBuilder() { Reset(); }
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private:
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private:
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IRBuilder(IRBuilder&); // DO NOT IMPLEMENT
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IRBuilder(IRBuilder&); // DO NOT IMPLEMENT
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std::vector<Inst> InstList; // FIXME: We must ensure this is
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std::vector<Inst> InstList; // FIXME: We must ensure this is
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// continuous!
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// continuous!
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@ -549,7 +549,7 @@ namespace IREmitter {
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InstLoc CTRCacheStore;
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InstLoc CTRCacheStore;
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InstLoc CRCache[8];
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InstLoc CRCache[8];
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InstLoc CRCacheStore[8];
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InstLoc CRCacheStore[8];
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};
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};
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};
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};
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@ -170,13 +170,13 @@ namespace CPUCompare
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extern u32 m_BlockStart;
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extern u32 m_BlockStart;
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}
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}
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void Jit(u32 em_address)
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void Jit(u32 em_address)
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{
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{
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jit.Jit(em_address);
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jit.Jit(em_address);
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}
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}
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void Jit64::Init()
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void Jit64::Init()
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{
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{
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asm_routines.compareEnabled = ::Core::g_CoreStartupParameter.bRunCompareClient;
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asm_routines.compareEnabled = ::Core::g_CoreStartupParameter.bRunCompareClient;
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if (Core::g_CoreStartupParameter.bJITUnlimitedCache)
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if (Core::g_CoreStartupParameter.bJITUnlimitedCache)
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CODE_SIZE = 1024*1024*8*8;
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CODE_SIZE = 1024*1024*8*8;
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@ -206,27 +206,27 @@ namespace CPUCompare
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blocks.Init();
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blocks.Init();
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asm_routines.Init();
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asm_routines.Init();
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}
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}
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void Jit64::ClearCache()
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void Jit64::ClearCache()
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{
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{
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blocks.Clear();
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blocks.Clear();
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trampolines.ClearCodeSpace();
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trampolines.ClearCodeSpace();
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ClearCodeSpace();
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ClearCodeSpace();
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}
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}
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void Jit64::Shutdown()
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void Jit64::Shutdown()
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{
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{
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FreeCodeSpace();
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FreeCodeSpace();
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blocks.Shutdown();
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blocks.Shutdown();
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trampolines.Shutdown();
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trampolines.Shutdown();
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asm_routines.Shutdown();
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asm_routines.Shutdown();
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}
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}
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void Jit64::WriteCallInterpreter(UGeckoInstruction inst)
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void Jit64::WriteCallInterpreter(UGeckoInstruction inst)
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{
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{
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gpr.Flush(FLUSH_ALL);
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gpr.Flush(FLUSH_ALL);
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fpr.Flush(FLUSH_ALL);
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fpr.Flush(FLUSH_ALL);
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if (js.isLastInstruction)
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if (js.isLastInstruction)
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@ -241,50 +241,50 @@ namespace CPUCompare
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MOV(32, R(EAX), M(&NPC));
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MOV(32, R(EAX), M(&NPC));
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WriteRfiExitDestInEAX();
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WriteRfiExitDestInEAX();
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}
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}
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}
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}
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void Jit64::unknown_instruction(UGeckoInstruction inst)
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void Jit64::unknown_instruction(UGeckoInstruction inst)
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{
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{
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// CCPU::Break();
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// CCPU::Break();
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PanicAlert("unknown_instruction %08x - Fix me ;)", inst.hex);
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PanicAlert("unknown_instruction %08x - Fix me ;)", inst.hex);
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}
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}
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void Jit64::Default(UGeckoInstruction _inst)
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void Jit64::Default(UGeckoInstruction _inst)
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{
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{
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ibuild.EmitInterpreterFallback(
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ibuild.EmitInterpreterFallback(
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ibuild.EmitIntConst(_inst.hex),
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ibuild.EmitIntConst(_inst.hex),
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ibuild.EmitIntConst(js.compilerPC));
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ibuild.EmitIntConst(js.compilerPC));
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}
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}
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void Jit64::HLEFunction(UGeckoInstruction _inst)
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void Jit64::HLEFunction(UGeckoInstruction _inst)
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{
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{
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gpr.Flush(FLUSH_ALL);
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gpr.Flush(FLUSH_ALL);
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fpr.Flush(FLUSH_ALL);
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fpr.Flush(FLUSH_ALL);
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ABI_CallFunctionCC((void*)&HLE::Execute, js.compilerPC, _inst.hex);
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ABI_CallFunctionCC((void*)&HLE::Execute, js.compilerPC, _inst.hex);
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MOV(32, R(EAX), M(&NPC));
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MOV(32, R(EAX), M(&NPC));
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WriteExitDestInEAX(0);
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WriteExitDestInEAX(0);
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}
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}
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void Jit64::DoNothing(UGeckoInstruction _inst)
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void Jit64::DoNothing(UGeckoInstruction _inst)
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{
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{
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// Yup, just don't do anything.
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// Yup, just don't do anything.
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}
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}
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void Jit64::NotifyBreakpoint(u32 em_address, bool set)
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void Jit64::NotifyBreakpoint(u32 em_address, bool set)
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{
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{
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int block_num = blocks.GetBlockNumberFromStartAddress(em_address);
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int block_num = blocks.GetBlockNumberFromStartAddress(em_address);
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if (block_num >= 0)
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if (block_num >= 0)
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{
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{
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blocks.DestroyBlock(block_num, false);
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blocks.DestroyBlock(block_num, false);
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}
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}
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}
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}
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static const bool ImHereDebug = false;
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static const bool ImHereDebug = false;
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static const bool ImHereLog = false;
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static const bool ImHereLog = false;
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static std::map<u32, int> been_here;
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static std::map<u32, int> been_here;
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void ImHere()
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void ImHere()
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{
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{
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static FILE *f = 0;
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static FILE *f = 0;
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if (ImHereLog) {
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if (ImHereLog) {
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if (!f)
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if (!f)
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DEBUG_LOG(DYNA_REC, "I'm here - PC = %08x , LR = %08x", PC, LR);
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DEBUG_LOG(DYNA_REC, "I'm here - PC = %08x , LR = %08x", PC, LR);
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// printf("I'm here - PC = %08x , LR = %08x", PC, LR);
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// printf("I'm here - PC = %08x , LR = %08x", PC, LR);
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been_here[PC] = 1;
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been_here[PC] = 1;
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}
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}
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void Jit64::Cleanup()
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void Jit64::Cleanup()
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{
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{
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if (jo.optimizeGatherPipe && js.fifoBytesThisBlock > 0)
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if (jo.optimizeGatherPipe && js.fifoBytesThisBlock > 0)
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ABI_CallFunction((void *)&GPFifo::CheckGatherPipe);
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ABI_CallFunction((void *)&GPFifo::CheckGatherPipe);
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}
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}
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void Jit64::WriteExit(u32 destination, int exit_num)
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void Jit64::WriteExit(u32 destination, int exit_num)
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{
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{
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Cleanup();
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Cleanup();
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SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
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SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
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MOV(32, M(&PC), Imm32(destination));
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MOV(32, M(&PC), Imm32(destination));
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JMP(asm_routines.dispatcher, true);
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JMP(asm_routines.dispatcher, true);
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}
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}
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}
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}
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void Jit64::WriteExitDestInEAX(int exit_num)
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void Jit64::WriteExitDestInEAX(int exit_num)
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{
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{
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MOV(32, M(&PC), R(EAX));
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MOV(32, M(&PC), R(EAX));
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Cleanup();
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Cleanup();
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SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
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SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
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JMP(asm_routines.dispatcher, true);
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JMP(asm_routines.dispatcher, true);
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}
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}
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void Jit64::WriteRfiExitDestInEAX()
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void Jit64::WriteRfiExitDestInEAX()
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{
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{
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MOV(32, M(&PC), R(EAX));
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MOV(32, M(&PC), R(EAX));
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Cleanup();
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Cleanup();
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SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
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SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount));
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JMP(asm_routines.testExceptions, true);
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JMP(asm_routines.testExceptions, true);
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}
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}
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void Jit64::WriteExceptionExit(u32 exception)
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void Jit64::WriteExceptionExit(u32 exception)
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{
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{
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Cleanup();
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Cleanup();
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OR(32, M(&PowerPC::ppcState.Exceptions), Imm32(exception));
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OR(32, M(&PowerPC::ppcState.Exceptions), Imm32(exception));
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MOV(32, M(&PC), Imm32(js.compilerPC + 4));
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MOV(32, M(&PC), Imm32(js.compilerPC + 4));
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JMP(asm_routines.testExceptions, true);
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JMP(asm_routines.testExceptions, true);
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}
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}
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void STACKALIGN Jit64::Run()
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void STACKALIGN Jit64::Run()
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{
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{
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CompiledCode pExecAddr = (CompiledCode)asm_routines.enterCode;
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CompiledCode pExecAddr = (CompiledCode)asm_routines.enterCode;
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pExecAddr();
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pExecAddr();
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//Will return when PowerPC::state changes
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//Will return when PowerPC::state changes
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}
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}
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void Jit64::SingleStep()
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void Jit64::SingleStep()
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{
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{
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// NOT USED, NOT TESTED, PROBABLY NOT WORKING YET
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// NOT USED, NOT TESTED, PROBABLY NOT WORKING YET
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// PanicAlert("Single");
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// PanicAlert("Single");
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/*
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/*
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const u8 *code = DoJit(PowerPC::ppcState.pc, &temp_codebuffer, &temp_block);
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const u8 *code = DoJit(PowerPC::ppcState.pc, &temp_codebuffer, &temp_block);
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CompiledCode pExecAddr = (CompiledCode)code;
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CompiledCode pExecAddr = (CompiledCode)code;
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pExecAddr();*/
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pExecAddr();*/
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}
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}
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void STACKALIGN Jit64::Jit(u32 em_address)
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void STACKALIGN Jit64::Jit(u32 em_address)
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{
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{
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if (GetSpaceLeft() < 0x10000 || blocks.IsFull())
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if (GetSpaceLeft() < 0x10000 || blocks.IsFull())
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{
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{
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INFO_LOG(DYNA_REC, "JIT cache full - clearing.")
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INFO_LOG(DYNA_REC, "JIT cache full - clearing.")
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@ -396,10 +396,10 @@ namespace CPUCompare
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int block_num = blocks.AllocateBlock(em_address);
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int block_num = blocks.AllocateBlock(em_address);
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JitBlock *b = blocks.GetBlock(block_num);
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JitBlock *b = blocks.GetBlock(block_num);
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blocks.FinalizeBlock(block_num, jo.enableBlocklink, DoJit(em_address, &code_buffer, b));
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blocks.FinalizeBlock(block_num, jo.enableBlocklink, DoJit(em_address, &code_buffer, b));
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}
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}
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const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buffer, JitBlock *b)
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const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buffer, JitBlock *b)
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{
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{
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if (em_address == 0)
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if (em_address == 0)
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PanicAlert("ERROR : Trying to compile at 0. LR=%08x", LR);
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PanicAlert("ERROR : Trying to compile at 0. LR=%08x", LR);
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@ -480,4 +480,4 @@ namespace CPUCompare
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b->codeSize = (u32)(GetCodePtr() - normalEntry);
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b->codeSize = (u32)(GetCodePtr() - normalEntry);
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b->originalSize = size;
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b->originalSize = size;
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return normalEntry;
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return normalEntry;
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}
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}
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|
|
@ -71,6 +71,14 @@ struct CONTEXT
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Core::g_CoreStartupParameter.bJIT##type##Off) \
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Core::g_CoreStartupParameter.bJIT##type##Off) \
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{Default(inst); return;}
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{Default(inst); return;}
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#ifdef _M_X64
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#define DISABLE64 \
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{Default(inst); return;}
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#else
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#define DISABLE64
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#endif
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class TrampolineCache : public Gen::XCodeBlock
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class TrampolineCache : public Gen::XCodeBlock
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{
|
{
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public:
|
public:
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|
|
|
@ -45,18 +45,18 @@
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|
|
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using namespace Gen;
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using namespace Gen;
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|
|
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void Jit64::sc(UGeckoInstruction inst)
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void Jit64::sc(UGeckoInstruction inst)
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||||||
{
|
{
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ibuild.EmitSystemCall(ibuild.EmitIntConst(js.compilerPC));
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ibuild.EmitSystemCall(ibuild.EmitIntConst(js.compilerPC));
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}
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}
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|
|
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void Jit64::rfi(UGeckoInstruction inst)
|
void Jit64::rfi(UGeckoInstruction inst)
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{
|
{
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ibuild.EmitRFIExit();
|
ibuild.EmitRFIExit();
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::bx(UGeckoInstruction inst)
|
void Jit64::bx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
NORMALBRANCH_START
|
NORMALBRANCH_START
|
||||||
INSTRUCTION_START;
|
INSTRUCTION_START;
|
||||||
|
|
||||||
|
@ -75,9 +75,9 @@ using namespace Gen;
|
||||||
}
|
}
|
||||||
|
|
||||||
ibuild.EmitBranchUncond(ibuild.EmitIntConst(destination));
|
ibuild.EmitBranchUncond(ibuild.EmitIntConst(destination));
|
||||||
}
|
}
|
||||||
|
|
||||||
static IREmitter::InstLoc TestBranch(IREmitter::IRBuilder& ibuild, UGeckoInstruction inst) {
|
static IREmitter::InstLoc TestBranch(IREmitter::IRBuilder& ibuild, UGeckoInstruction inst) {
|
||||||
IREmitter::InstLoc CRTest = 0, CTRTest = 0;
|
IREmitter::InstLoc CRTest = 0, CTRTest = 0;
|
||||||
if ((inst.BO & 16) == 0) // Test a CR bit
|
if ((inst.BO & 16) == 0) // Test a CR bit
|
||||||
{
|
{
|
||||||
|
@ -112,10 +112,10 @@ using namespace Gen;
|
||||||
Test = ibuild.EmitIntConst(1);
|
Test = ibuild.EmitIntConst(1);
|
||||||
}
|
}
|
||||||
return Test;
|
return Test;
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::bcx(UGeckoInstruction inst)
|
void Jit64::bcx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
NORMALBRANCH_START
|
NORMALBRANCH_START
|
||||||
if (inst.LK)
|
if (inst.LK)
|
||||||
ibuild.EmitStoreLink(
|
ibuild.EmitStoreLink(
|
||||||
|
@ -143,10 +143,10 @@ using namespace Gen;
|
||||||
ibuild.EmitBranchCond(Test, ibuild.EmitIntConst(destination));
|
ibuild.EmitBranchCond(Test, ibuild.EmitIntConst(destination));
|
||||||
}
|
}
|
||||||
ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));
|
ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4));
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::bcctrx(UGeckoInstruction inst)
|
void Jit64::bcctrx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
NORMALBRANCH_START
|
NORMALBRANCH_START
|
||||||
if ((inst.BO & 4) == 0) {
|
if ((inst.BO & 4) == 0) {
|
||||||
IREmitter::InstLoc c = ibuild.EmitLoadCTR();
|
IREmitter::InstLoc c = ibuild.EmitLoadCTR();
|
||||||
|
@ -172,10 +172,10 @@ using namespace Gen;
|
||||||
if (inst.LK)
|
if (inst.LK)
|
||||||
ibuild.EmitStoreLink(ibuild.EmitIntConst(js.compilerPC + 4));
|
ibuild.EmitStoreLink(ibuild.EmitIntConst(js.compilerPC + 4));
|
||||||
ibuild.EmitBranchUncond(destination);
|
ibuild.EmitBranchUncond(destination);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::bclrx(UGeckoInstruction inst)
|
void Jit64::bclrx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
NORMALBRANCH_START
|
NORMALBRANCH_START
|
||||||
if (inst.hex == 0x4e800020) {
|
if (inst.hex == 0x4e800020) {
|
||||||
ibuild.EmitBranchUncond(ibuild.EmitLoadLink());
|
ibuild.EmitBranchUncond(ibuild.EmitLoadLink());
|
||||||
|
@ -190,5 +190,4 @@ using namespace Gen;
|
||||||
if (inst.LK)
|
if (inst.LK)
|
||||||
ibuild.EmitStoreLink(ibuild.EmitIntConst(js.compilerPC + 4));
|
ibuild.EmitStoreLink(ibuild.EmitIntConst(js.compilerPC + 4));
|
||||||
ibuild.EmitBranchUncond(destination);
|
ibuild.EmitBranchUncond(destination);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -28,8 +28,8 @@
|
||||||
//#define INSTRUCTION_START Default(inst); return;
|
//#define INSTRUCTION_START Default(inst); return;
|
||||||
#define INSTRUCTION_START
|
#define INSTRUCTION_START
|
||||||
|
|
||||||
void Jit64::fp_arith_s(UGeckoInstruction inst)
|
void Jit64::fp_arith_s(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(FloatingPoint)
|
JITDISABLE(FloatingPoint)
|
||||||
if (inst.Rc || (inst.SUBOP5 != 25 && inst.SUBOP5 != 20 && inst.SUBOP5 != 21)) {
|
if (inst.Rc || (inst.SUBOP5 != 25 && inst.SUBOP5 != 20 && inst.SUBOP5 != 21)) {
|
||||||
|
@ -61,10 +61,10 @@
|
||||||
val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD));
|
val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD));
|
||||||
}
|
}
|
||||||
ibuild.EmitStoreFReg(val, inst.FD);
|
ibuild.EmitStoreFReg(val, inst.FD);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::fmaddXX(UGeckoInstruction inst)
|
void Jit64::fmaddXX(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(FloatingPoint)
|
JITDISABLE(FloatingPoint)
|
||||||
if (inst.Rc) {
|
if (inst.Rc) {
|
||||||
|
@ -86,10 +86,10 @@
|
||||||
val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD));
|
val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD));
|
||||||
}
|
}
|
||||||
ibuild.EmitStoreFReg(val, inst.FD);
|
ibuild.EmitStoreFReg(val, inst.FD);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::fmrx(UGeckoInstruction inst)
|
void Jit64::fmrx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(FloatingPoint)
|
JITDISABLE(FloatingPoint)
|
||||||
if (inst.Rc) {
|
if (inst.Rc) {
|
||||||
|
@ -98,10 +98,10 @@
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FB);
|
IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FB);
|
||||||
val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD));
|
val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD));
|
||||||
ibuild.EmitStoreFReg(val, inst.FD);
|
ibuild.EmitStoreFReg(val, inst.FD);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::fcmpx(UGeckoInstruction inst)
|
void Jit64::fcmpx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(FloatingPoint)
|
JITDISABLE(FloatingPoint)
|
||||||
IREmitter::InstLoc lhs, rhs, res;
|
IREmitter::InstLoc lhs, rhs, res;
|
||||||
|
@ -110,4 +110,4 @@
|
||||||
res = ibuild.EmitFDCmpCR(lhs, rhs);
|
res = ibuild.EmitFDCmpCR(lhs, rhs);
|
||||||
ibuild.EmitStoreFPRF(res);
|
ibuild.EmitStoreFPRF(res);
|
||||||
ibuild.EmitStoreCR(res, inst.CRFD);
|
ibuild.EmitStoreCR(res, inst.CRFD);
|
||||||
}
|
}
|
||||||
|
|
|
@ -31,15 +31,15 @@
|
||||||
//#define INSTRUCTION_START Default(inst); return;
|
//#define INSTRUCTION_START Default(inst); return;
|
||||||
#define INSTRUCTION_START
|
#define INSTRUCTION_START
|
||||||
|
|
||||||
static void ComputeRC(IREmitter::IRBuilder& ibuild,
|
static void ComputeRC(IREmitter::IRBuilder& ibuild,
|
||||||
IREmitter::InstLoc val) {
|
IREmitter::InstLoc val) {
|
||||||
IREmitter::InstLoc res =
|
IREmitter::InstLoc res =
|
||||||
ibuild.EmitICmpCRSigned(val, ibuild.EmitIntConst(0));
|
ibuild.EmitICmpCRSigned(val, ibuild.EmitIntConst(0));
|
||||||
ibuild.EmitStoreCR(res, 0);
|
ibuild.EmitStoreCR(res, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::reg_imm(UGeckoInstruction inst)
|
void Jit64::reg_imm(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
int d = inst.RD, a = inst.RA, s = inst.RS;
|
int d = inst.RD, a = inst.RA, s = inst.RS;
|
||||||
|
@ -104,10 +104,10 @@
|
||||||
Default(inst);
|
Default(inst);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::cmpXX(UGeckoInstruction inst)
|
void Jit64::cmpXX(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc lhs, rhs, res;
|
IREmitter::InstLoc lhs, rhs, res;
|
||||||
|
@ -128,10 +128,10 @@
|
||||||
}
|
}
|
||||||
|
|
||||||
ibuild.EmitStoreCR(res, inst.CRFD);
|
ibuild.EmitStoreCR(res, inst.CRFD);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::orx(UGeckoInstruction inst)
|
void Jit64::orx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
||||||
|
@ -139,12 +139,12 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// m_GPR[_inst.RA] = m_GPR[_inst.RS] ^ m_GPR[_inst.RB];
|
// m_GPR[_inst.RA] = m_GPR[_inst.RS] ^ m_GPR[_inst.RB];
|
||||||
void Jit64::xorx(UGeckoInstruction inst)
|
void Jit64::xorx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
||||||
|
@ -152,10 +152,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::andx(UGeckoInstruction inst)
|
void Jit64::andx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
||||||
|
@ -163,10 +163,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::extsbx(UGeckoInstruction inst)
|
void Jit64::extsbx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS);
|
||||||
|
@ -174,10 +174,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::extshx(UGeckoInstruction inst)
|
void Jit64::extshx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS);
|
||||||
|
@ -185,10 +185,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::subfic(UGeckoInstruction inst)
|
void Jit64::subfic(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc nota, lhs, val, test;
|
IREmitter::InstLoc nota, lhs, val, test;
|
||||||
|
@ -204,10 +204,10 @@
|
||||||
}
|
}
|
||||||
ibuild.EmitStoreGReg(val, inst.RD);
|
ibuild.EmitStoreGReg(val, inst.RD);
|
||||||
ibuild.EmitStoreCarry(test);
|
ibuild.EmitStoreCarry(test);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::subfcx(UGeckoInstruction inst)
|
void Jit64::subfcx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
if (inst.OE) PanicAlert("OE: subfcx");
|
if (inst.OE) PanicAlert("OE: subfcx");
|
||||||
|
@ -221,10 +221,10 @@
|
||||||
ibuild.EmitStoreCarry(test);
|
ibuild.EmitStoreCarry(test);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::subfex(UGeckoInstruction inst)
|
void Jit64::subfex(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
if (inst.OE) PanicAlert("OE: subfex");
|
if (inst.OE) PanicAlert("OE: subfex");
|
||||||
|
@ -242,10 +242,10 @@
|
||||||
ibuild.EmitStoreCarry(test);
|
ibuild.EmitStoreCarry(test);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::subfx(UGeckoInstruction inst)
|
void Jit64::subfx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
if (inst.OE) PanicAlert("OE: subfx");
|
if (inst.OE) PanicAlert("OE: subfx");
|
||||||
|
@ -254,19 +254,19 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RD);
|
ibuild.EmitStoreGReg(val, inst.RD);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::mulli(UGeckoInstruction inst)
|
void Jit64::mulli(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA);
|
||||||
val = ibuild.EmitMul(val, ibuild.EmitIntConst(inst.SIMM_16));
|
val = ibuild.EmitMul(val, ibuild.EmitIntConst(inst.SIMM_16));
|
||||||
ibuild.EmitStoreGReg(val, inst.RD);
|
ibuild.EmitStoreGReg(val, inst.RD);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::mullwx(UGeckoInstruction inst)
|
void Jit64::mullwx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
||||||
|
@ -274,10 +274,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RD);
|
ibuild.EmitStoreGReg(val, inst.RD);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::mulhwux(UGeckoInstruction inst)
|
void Jit64::mulhwux(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
Default(inst); return;
|
Default(inst); return;
|
||||||
#if 0
|
#if 0
|
||||||
if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITIntegerOff)
|
if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITIntegerOff)
|
||||||
|
@ -308,10 +308,10 @@
|
||||||
MOV(32, gpr.R(d), R(EDX));
|
MOV(32, gpr.R(d), R(EDX));
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
// skipped some of the special handling in here - if we get crashes, let the interpreter handle this op
|
// skipped some of the special handling in here - if we get crashes, let the interpreter handle this op
|
||||||
void Jit64::divwux(UGeckoInstruction inst) {
|
void Jit64::divwux(UGeckoInstruction inst) {
|
||||||
Default(inst); return;
|
Default(inst); return;
|
||||||
#if 0
|
#if 0
|
||||||
int a = inst.RA, b = inst.RB, d = inst.RD;
|
int a = inst.RA, b = inst.RB, d = inst.RD;
|
||||||
|
@ -333,19 +333,19 @@
|
||||||
CALL((u8*)asm_routines.computeRc);
|
CALL((u8*)asm_routines.computeRc);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 Helper_Mask(u8 mb, u8 me)
|
u32 Helper_Mask(u8 mb, u8 me)
|
||||||
{
|
{
|
||||||
return (((mb > me) ?
|
return (((mb > me) ?
|
||||||
~(((u32)-1 >> mb) ^ ((me >= 31) ? 0 : (u32) -1 >> (me + 1)))
|
~(((u32)-1 >> mb) ^ ((me >= 31) ? 0 : (u32) -1 >> (me + 1)))
|
||||||
:
|
:
|
||||||
(((u32)-1 >> mb) ^ ((me >= 31) ? 0 : (u32) -1 >> (me + 1))))
|
(((u32)-1 >> mb) ^ ((me >= 31) ? 0 : (u32) -1 >> (me + 1))))
|
||||||
);
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::addx(UGeckoInstruction inst)
|
void Jit64::addx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
|
||||||
|
@ -353,10 +353,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RD);
|
ibuild.EmitStoreGReg(val, inst.RD);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::addzex(UGeckoInstruction inst)
|
void Jit64::addzex(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc lhs = ibuild.EmitLoadGReg(inst.RA),
|
IREmitter::InstLoc lhs = ibuild.EmitLoadGReg(inst.RA),
|
||||||
|
@ -367,10 +367,10 @@
|
||||||
ibuild.EmitStoreCarry(newcarry);
|
ibuild.EmitStoreCarry(newcarry);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
// This can be optimized
|
// This can be optimized
|
||||||
void Jit64::addex(UGeckoInstruction inst)
|
void Jit64::addex(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
Default(inst); return;
|
Default(inst); return;
|
||||||
#if 0
|
#if 0
|
||||||
// USES_XER
|
// USES_XER
|
||||||
|
@ -398,10 +398,10 @@
|
||||||
CALL((u8*)asm_routines.computeRc);
|
CALL((u8*)asm_routines.computeRc);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::rlwinmx(UGeckoInstruction inst)
|
void Jit64::rlwinmx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
unsigned mask = Helper_Mask(inst.MB, inst.ME);
|
unsigned mask = Helper_Mask(inst.MB, inst.ME);
|
||||||
|
@ -411,11 +411,11 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void Jit64::rlwimix(UGeckoInstruction inst)
|
void Jit64::rlwimix(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
unsigned mask = Helper_Mask(inst.MB, inst.ME);
|
unsigned mask = Helper_Mask(inst.MB, inst.ME);
|
||||||
|
@ -428,10 +428,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::rlwnmx(UGeckoInstruction inst)
|
void Jit64::rlwnmx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
unsigned int mask = Helper_Mask(inst.MB, inst.ME);
|
unsigned int mask = Helper_Mask(inst.MB, inst.ME);
|
||||||
|
@ -441,10 +441,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::negx(UGeckoInstruction inst)
|
void Jit64::negx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA);
|
||||||
|
@ -452,10 +452,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RD);
|
ibuild.EmitStoreGReg(val, inst.RD);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::srwx(UGeckoInstruction inst)
|
void Jit64::srwx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS),
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS),
|
||||||
|
@ -471,10 +471,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::slwx(UGeckoInstruction inst)
|
void Jit64::slwx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS),
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS),
|
||||||
|
@ -490,10 +490,10 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::srawx(UGeckoInstruction inst)
|
void Jit64::srawx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
// FIXME: We can do a lot better on 64-bit
|
// FIXME: We can do a lot better on 64-bit
|
||||||
|
@ -513,10 +513,10 @@
|
||||||
test = ibuild.EmitOr(val, mask2);
|
test = ibuild.EmitOr(val, mask2);
|
||||||
test = ibuild.EmitICmpUgt(test, mask);
|
test = ibuild.EmitICmpUgt(test, mask);
|
||||||
ibuild.EmitStoreCarry(test);
|
ibuild.EmitStoreCarry(test);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::srawix(UGeckoInstruction inst)
|
void Jit64::srawix(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS), test;
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS), test;
|
||||||
|
@ -529,11 +529,11 @@
|
||||||
ibuild.EmitStoreCarry(test);
|
ibuild.EmitStoreCarry(test);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
// count leading zeroes
|
// count leading zeroes
|
||||||
void Jit64::cntlzwx(UGeckoInstruction inst)
|
void Jit64::cntlzwx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Integer)
|
JITDISABLE(Integer)
|
||||||
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS);
|
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS);
|
||||||
|
@ -541,4 +541,4 @@
|
||||||
ibuild.EmitStoreGReg(val, inst.RA);
|
ibuild.EmitStoreGReg(val, inst.RA);
|
||||||
if (inst.Rc)
|
if (inst.Rc)
|
||||||
ComputeRC(ibuild, val);
|
ComputeRC(ibuild, val);
|
||||||
}
|
}
|
||||||
|
|
|
@ -41,6 +41,7 @@
|
||||||
void Jit64::lhax(UGeckoInstruction inst)
|
void Jit64::lhax(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStore)
|
JITDISABLE(LoadStore)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB);
|
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB);
|
||||||
if (inst.RA)
|
if (inst.RA)
|
||||||
|
@ -53,6 +54,7 @@ void Jit64::lhax(UGeckoInstruction inst)
|
||||||
void Jit64::lXz(UGeckoInstruction inst)
|
void Jit64::lXz(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStore)
|
JITDISABLE(LoadStore)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
|
||||||
if (inst.RA)
|
if (inst.RA)
|
||||||
|
@ -73,6 +75,7 @@ void Jit64::lXz(UGeckoInstruction inst)
|
||||||
void Jit64::lha(UGeckoInstruction inst)
|
void Jit64::lha(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStore)
|
JITDISABLE(LoadStore)
|
||||||
IREmitter::InstLoc addr =
|
IREmitter::InstLoc addr =
|
||||||
ibuild.EmitIntConst((s32)(s16)inst.SIMM_16);
|
ibuild.EmitIntConst((s32)(s16)inst.SIMM_16);
|
||||||
|
@ -86,6 +89,7 @@ void Jit64::lha(UGeckoInstruction inst)
|
||||||
void Jit64::lXzx(UGeckoInstruction inst)
|
void Jit64::lXzx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStore)
|
JITDISABLE(LoadStore)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB);
|
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB);
|
||||||
if (inst.RA) {
|
if (inst.RA) {
|
||||||
|
@ -108,6 +112,8 @@ void Jit64::lXzx(UGeckoInstruction inst)
|
||||||
void Jit64::dcbz(UGeckoInstruction inst)
|
void Jit64::dcbz(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
Default(inst); return;
|
Default(inst); return;
|
||||||
|
|
||||||
|
// TODO!
|
||||||
#if 0
|
#if 0
|
||||||
if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITLoadStoreOff)
|
if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITLoadStoreOff)
|
||||||
{Default(inst); return;} // turn off from debugger
|
{Default(inst); return;} // turn off from debugger
|
||||||
|
@ -131,6 +137,7 @@ void Jit64::dcbz(UGeckoInstruction inst)
|
||||||
void Jit64::stX(UGeckoInstruction inst)
|
void Jit64::stX(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStore)
|
JITDISABLE(LoadStore)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
|
||||||
value = ibuild.EmitLoadGReg(inst.RS);
|
value = ibuild.EmitLoadGReg(inst.RS);
|
||||||
|
@ -150,6 +157,7 @@ void Jit64::stX(UGeckoInstruction inst)
|
||||||
void Jit64::stXx(UGeckoInstruction inst)
|
void Jit64::stXx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStore)
|
JITDISABLE(LoadStore)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB),
|
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB),
|
||||||
value = ibuild.EmitLoadGReg(inst.RS);
|
value = ibuild.EmitLoadGReg(inst.RS);
|
||||||
|
@ -169,6 +177,7 @@ void Jit64::stXx(UGeckoInstruction inst)
|
||||||
void Jit64::lmw(UGeckoInstruction inst)
|
void Jit64::lmw(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStore)
|
JITDISABLE(LoadStore)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
|
||||||
if (inst.RA)
|
if (inst.RA)
|
||||||
|
@ -184,6 +193,7 @@ void Jit64::lmw(UGeckoInstruction inst)
|
||||||
void Jit64::stmw(UGeckoInstruction inst)
|
void Jit64::stmw(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStore)
|
JITDISABLE(LoadStore)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16);
|
||||||
if (inst.RA)
|
if (inst.RA)
|
||||||
|
|
|
@ -45,6 +45,7 @@
|
||||||
void Jit64::lfs(UGeckoInstruction inst)
|
void Jit64::lfs(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStoreFloating)
|
JITDISABLE(LoadStoreFloating)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val;
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val;
|
||||||
if (inst.RA)
|
if (inst.RA)
|
||||||
|
@ -58,6 +59,7 @@ void Jit64::lfs(UGeckoInstruction inst)
|
||||||
void Jit64::lfd(UGeckoInstruction inst)
|
void Jit64::lfd(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStoreFloating)
|
JITDISABLE(LoadStoreFloating)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val;
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val;
|
||||||
if (inst.RA)
|
if (inst.RA)
|
||||||
|
@ -72,6 +74,7 @@ void Jit64::lfd(UGeckoInstruction inst)
|
||||||
void Jit64::stfd(UGeckoInstruction inst)
|
void Jit64::stfd(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStoreFloating)
|
JITDISABLE(LoadStoreFloating)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
|
||||||
val = ibuild.EmitLoadFReg(inst.RS);
|
val = ibuild.EmitLoadFReg(inst.RS);
|
||||||
|
@ -87,6 +90,7 @@ void Jit64::stfd(UGeckoInstruction inst)
|
||||||
void Jit64::stfs(UGeckoInstruction inst)
|
void Jit64::stfs(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStoreFloating)
|
JITDISABLE(LoadStoreFloating)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16),
|
||||||
val = ibuild.EmitLoadFReg(inst.RS);
|
val = ibuild.EmitLoadFReg(inst.RS);
|
||||||
|
@ -103,6 +107,7 @@ void Jit64::stfs(UGeckoInstruction inst)
|
||||||
void Jit64::stfsx(UGeckoInstruction inst)
|
void Jit64::stfsx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStoreFloating)
|
JITDISABLE(LoadStoreFloating)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB),
|
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB),
|
||||||
val = ibuild.EmitLoadFReg(inst.RS);
|
val = ibuild.EmitLoadFReg(inst.RS);
|
||||||
|
@ -117,6 +122,7 @@ void Jit64::stfsx(UGeckoInstruction inst)
|
||||||
void Jit64::lfsx(UGeckoInstruction inst)
|
void Jit64::lfsx(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStoreFloating)
|
JITDISABLE(LoadStoreFloating)
|
||||||
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), val;
|
IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), val;
|
||||||
if (inst.RA)
|
if (inst.RA)
|
||||||
|
|
|
@ -44,6 +44,7 @@
|
||||||
void Jit64::psq_st(UGeckoInstruction inst)
|
void Jit64::psq_st(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStorePaired)
|
JITDISABLE(LoadStorePaired)
|
||||||
if (inst.W || !Core::GetStartupParameter().bOptimizeQuantizers) {Default(inst); return;}
|
if (inst.W || !Core::GetStartupParameter().bOptimizeQuantizers) {Default(inst); return;}
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val;
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val;
|
||||||
|
@ -59,6 +60,7 @@ void Jit64::psq_st(UGeckoInstruction inst)
|
||||||
void Jit64::psq_l(UGeckoInstruction inst)
|
void Jit64::psq_l(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
DISABLE64
|
||||||
JITDISABLE(LoadStorePaired)
|
JITDISABLE(LoadStorePaired)
|
||||||
if (inst.W || !Core::GetStartupParameter().bOptimizeQuantizers) {Default(inst); return;}
|
if (inst.W || !Core::GetStartupParameter().bOptimizeQuantizers) {Default(inst); return;}
|
||||||
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val;
|
IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val;
|
||||||
|
|
|
@ -26,28 +26,28 @@
|
||||||
#include "Jit.h"
|
#include "Jit.h"
|
||||||
#include "JitRegCache.h"
|
#include "JitRegCache.h"
|
||||||
|
|
||||||
void Jit64::ps_mr(UGeckoInstruction inst)
|
void Jit64::ps_mr(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
Default(inst); return;
|
Default(inst); return;
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::ps_sel(UGeckoInstruction inst)
|
void Jit64::ps_sel(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
Default(inst); return;
|
Default(inst); return;
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::ps_sign(UGeckoInstruction inst)
|
void Jit64::ps_sign(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
Default(inst); return;
|
Default(inst); return;
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::ps_rsqrte(UGeckoInstruction inst)
|
void Jit64::ps_rsqrte(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
Default(inst); return;
|
Default(inst); return;
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::ps_arith(UGeckoInstruction inst)
|
void Jit64::ps_arith(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Paired)
|
JITDISABLE(Paired)
|
||||||
if (inst.Rc || (inst.SUBOP5 != 21 && inst.SUBOP5 != 20 && inst.SUBOP5 != 25)) {
|
if (inst.Rc || (inst.SUBOP5 != 21 && inst.SUBOP5 != 20 && inst.SUBOP5 != 25)) {
|
||||||
|
@ -73,10 +73,10 @@
|
||||||
}
|
}
|
||||||
val = ibuild.EmitExpandPackedToMReg(val);
|
val = ibuild.EmitExpandPackedToMReg(val);
|
||||||
ibuild.EmitStoreFReg(val, inst.FD);
|
ibuild.EmitStoreFReg(val, inst.FD);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::ps_sum(UGeckoInstruction inst)
|
void Jit64::ps_sum(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
// FIXME: This operation strikes me as a bit strange...
|
// FIXME: This operation strikes me as a bit strange...
|
||||||
// perhaps we can optimize it depending on the users?
|
// perhaps we can optimize it depending on the users?
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
@ -93,11 +93,11 @@
|
||||||
val = ibuild.EmitFPMerge11(val, temp);
|
val = ibuild.EmitFPMerge11(val, temp);
|
||||||
val = ibuild.EmitExpandPackedToMReg(val);
|
val = ibuild.EmitExpandPackedToMReg(val);
|
||||||
ibuild.EmitStoreFReg(val, inst.FD);
|
ibuild.EmitStoreFReg(val, inst.FD);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void Jit64::ps_muls(UGeckoInstruction inst)
|
void Jit64::ps_muls(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Paired)
|
JITDISABLE(Paired)
|
||||||
if (inst.Rc) {
|
if (inst.Rc) {
|
||||||
|
@ -117,12 +117,12 @@
|
||||||
val = ibuild.EmitFPMul(val, rhs);
|
val = ibuild.EmitFPMul(val, rhs);
|
||||||
val = ibuild.EmitExpandPackedToMReg(val);
|
val = ibuild.EmitExpandPackedToMReg(val);
|
||||||
ibuild.EmitStoreFReg(val, inst.FD);
|
ibuild.EmitStoreFReg(val, inst.FD);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
//TODO: find easy cases and optimize them, do a breakout like ps_arith
|
//TODO: find easy cases and optimize them, do a breakout like ps_arith
|
||||||
void Jit64::ps_mergeXX(UGeckoInstruction inst)
|
void Jit64::ps_mergeXX(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Paired)
|
JITDISABLE(Paired)
|
||||||
if (inst.Rc) {
|
if (inst.Rc) {
|
||||||
|
@ -151,11 +151,11 @@
|
||||||
}
|
}
|
||||||
val = ibuild.EmitExpandPackedToMReg(val);
|
val = ibuild.EmitExpandPackedToMReg(val);
|
||||||
ibuild.EmitStoreFReg(val, inst.FD);
|
ibuild.EmitStoreFReg(val, inst.FD);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void Jit64::ps_maddXX(UGeckoInstruction inst)
|
void Jit64::ps_maddXX(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
JITDISABLE(Paired)
|
JITDISABLE(Paired)
|
||||||
if (inst.Rc) {
|
if (inst.Rc) {
|
||||||
|
@ -215,4 +215,4 @@
|
||||||
}
|
}
|
||||||
val = ibuild.EmitExpandPackedToMReg(val);
|
val = ibuild.EmitExpandPackedToMReg(val);
|
||||||
ibuild.EmitStoreFReg(val, inst.FD);
|
ibuild.EmitStoreFReg(val, inst.FD);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue