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Merge pull request #10052 from JosJuice/jitarm64-sbtm-attempt-2 

JitArm64: Indexed paired loadstores workaround, attempt 2
This commit is contained in:
Markus Wick 2021-08-23 19:09:29 +02:00 committed by GitHub
parent bc10412d24 6b8d17ce57
commit 757985d4c2
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 14 additions and 12 deletions
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18
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp
View File

@ -39,6 +39,7 @@ void JitArm64::psq_lXX(UGeckoInstruction inst)
gpr.Lock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
fpr.Lock(ARM64Reg::Q0, ARM64Reg::Q1);
const ARM64Reg arm_addr = gpr.R(inst.RA);
constexpr ARM64Reg scale_reg = ARM64Reg::W0;
constexpr ARM64Reg addr_reg = ARM64Reg::W1;
constexpr ARM64Reg type_reg = ARM64Reg::W2;
@ -47,11 +48,11 @@ void JitArm64::psq_lXX(UGeckoInstruction inst)
if (inst.RA || update) // Always uses the register on update
{
if (indexed)
ADD(addr_reg, gpr.R(inst.RA), gpr.R(inst.RB));
ADD(addr_reg, arm_addr, gpr.R(inst.RB));
else if (offset >= 0)
ADD(addr_reg, gpr.R(inst.RA), offset);
ADD(addr_reg, arm_addr, offset);
else
SUB(addr_reg, gpr.R(inst.RA), std::abs(offset));
SUB(addr_reg, arm_addr, std::abs(offset));
}
else
{
@ -64,7 +65,7 @@ void JitArm64::psq_lXX(UGeckoInstruction inst)
if (update)
{
gpr.BindToRegister(inst.RA, false);
MOV(gpr.R(inst.RA), addr_reg);
MOV(arm_addr, addr_reg);
}
if (js.assumeNoPairedQuantize)
@ -162,6 +163,7 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
gpr.Lock(ARM64Reg::W0, ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
const ARM64Reg arm_addr = gpr.R(inst.RA);
constexpr ARM64Reg scale_reg = ARM64Reg::W0;
constexpr ARM64Reg addr_reg = ARM64Reg::W1;
constexpr ARM64Reg type_reg = ARM64Reg::W2;
@ -176,11 +178,11 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
if (inst.RA || update) // Always uses the register on update
{
if (indexed)
ADD(addr_reg, gpr.R(inst.RA), gpr.R(inst.RB));
ADD(addr_reg, arm_addr, gpr.R(inst.RB));
else if (offset >= 0)
ADD(addr_reg, gpr.R(inst.RA), offset);
ADD(addr_reg, arm_addr, offset);
else
SUB(addr_reg, gpr.R(inst.RA), std::abs(offset));
SUB(addr_reg, arm_addr, std::abs(offset));
}
else
{
@ -193,7 +195,7 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
if (update)
{
gpr.BindToRegister(inst.RA, false);
MOV(gpr.R(inst.RA), addr_reg);
MOV(arm_addr, addr_reg);
}
if (js.assumeNoPairedQuantize)

8
Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp
View File

@ -125,10 +125,10 @@ constexpr std::array<GekkoOPTemplate, 17> table4_2{{
}};
constexpr std::array<GekkoOPTemplate, 4> table4_3{{
{6, &JitArm64::FallBackToInterpreter}, // psq_lx (disabled for the time being due to bugs)
{7, &JitArm64::FallBackToInterpreter}, // psq_stx (disabled for the time being due to bugs)
{38, &JitArm64::FallBackToInterpreter}, // psq_lux (disabled for the time being due to bugs)
{39, &JitArm64::FallBackToInterpreter}, // psq_stux (disabled for the time being due to bugs)
{6, &JitArm64::psq_lXX}, // psq_lx
{7, &JitArm64::psq_stXX}, // psq_stx
{38, &JitArm64::psq_lXX}, // psq_lux
{39, &JitArm64::psq_stXX}, // psq_stux
}};
constexpr std::array<GekkoOPTemplate, 13> table19{{