DSP jit more work

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5419 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee 2010-04-27 18:15:08 +00:00
parent c7634aa8dc
commit 757285f7d0
2 changed files with 38 additions and 32 deletions

View File

@ -95,7 +95,7 @@ void DSPEmitter::l(const UDSPInstruction opc)
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT)) if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
{ {
u16 val; u16 val;
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&val), R(EAX)); MOV(16, M(&val), R(EAX));
writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000); writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
@ -105,7 +105,7 @@ void DSPEmitter::l(const UDSPInstruction opc)
} }
else else
{ {
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[dreg]), R(EAX)); MOV(16, M(&g_dsp.r[dreg]), R(EAX));
increment_addr_reg(sreg); increment_addr_reg(sreg);
} }
@ -123,7 +123,7 @@ void DSPEmitter::ln(const UDSPInstruction opc)
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT)) if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
{ {
u16 val; u16 val;
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&val), R(EAX)); MOV(16, M(&val), R(EAX));
writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000); writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
writeToBackLog(1, dreg, val); writeToBackLog(1, dreg, val);
@ -132,7 +132,7 @@ void DSPEmitter::ln(const UDSPInstruction opc)
} }
else else
{ {
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[dreg]), R(EAX)); MOV(16, M(&g_dsp.r[dreg]), R(EAX));
increase_addr_reg(sreg); increase_addr_reg(sreg);
} }
@ -308,7 +308,7 @@ void DSPEmitter::ld(const UDSPInstruction opc)
if (sreg != DSP_REG_AR3) { if (sreg != DSP_REG_AR3) {
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[(dreg << 1) + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[(dreg << 1) + DSP_REG_AXL0]), R(EAX));
// if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) { // if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
@ -318,11 +318,11 @@ void DSPEmitter::ld(const UDSPInstruction opc)
SHR(16, R(EDI), Imm8(10)); SHR(16, R(EDI), Imm8(10));
CMP(16, R(ESI), R(EDI)); CMP(16, R(ESI), R(EDI));
FixupBranch not_equal = J_CC(CC_NE); FixupBranch not_equal = J_CC(CC_NE);
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX)); MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX));
FixupBranch after = J(); FixupBranch after = J();
SetJumpTarget(not_equal); // else SetJumpTarget(not_equal); // else
ext_dmem_read(g_dsp.r[DSP_REG_AR3]); ext_dmem_read(DSP_REG_AR3);
MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX)); MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX));
SetJumpTarget(after); SetJumpTarget(after);
@ -330,7 +330,7 @@ void DSPEmitter::ld(const UDSPInstruction opc)
} else { } else {
ext_dmem_read(g_dsp.r[dreg]); ext_dmem_read(dreg);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXH0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXH0]), R(EAX));
//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) { //if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
@ -340,11 +340,11 @@ void DSPEmitter::ld(const UDSPInstruction opc)
SHR(16, R(EDI), Imm8(10)); SHR(16, R(EDI), Imm8(10));
CMP(16, R(ESI), R(EDI)); CMP(16, R(ESI), R(EDI));
FixupBranch not_equal = J_CC(CC_NE); FixupBranch not_equal = J_CC(CC_NE);
ext_dmem_read(g_dsp.r[dreg]); ext_dmem_read(dreg);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX));
FixupBranch after = J(); // else FixupBranch after = J(); // else
SetJumpTarget(not_equal); SetJumpTarget(not_equal);
ext_dmem_read(g_dsp.r[DSP_REG_AR3]); ext_dmem_read(DSP_REG_AR3);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX));
SetJumpTarget(after); SetJumpTarget(after);
@ -364,7 +364,7 @@ void DSPEmitter::ldn(const UDSPInstruction opc)
if (sreg != DSP_REG_AR3) { if (sreg != DSP_REG_AR3) {
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[(dreg << 1) + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[(dreg << 1) + DSP_REG_AXL0]), R(EAX));
// if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) { // if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
@ -374,17 +374,17 @@ void DSPEmitter::ldn(const UDSPInstruction opc)
SHR(16, R(EDI), Imm8(10)); SHR(16, R(EDI), Imm8(10));
CMP(16, R(ESI), R(EDI)); CMP(16, R(ESI), R(EDI));
FixupBranch not_equal = J_CC(CC_NE); FixupBranch not_equal = J_CC(CC_NE);
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX)); MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX));
FixupBranch after = J(); FixupBranch after = J();
SetJumpTarget(not_equal); // else SetJumpTarget(not_equal); // else
ext_dmem_read(g_dsp.r[DSP_REG_AR3]); ext_dmem_read(DSP_REG_AR3);
MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX)); MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX));
SetJumpTarget(after); SetJumpTarget(after);
increase_addr_reg(sreg); increase_addr_reg(sreg);
} else { } else {
ext_dmem_read(g_dsp.r[dreg]); ext_dmem_read(dreg);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXH0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXH0]), R(EAX));
//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) { //if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
@ -394,11 +394,11 @@ void DSPEmitter::ldn(const UDSPInstruction opc)
SHR(16, R(EDI), Imm8(10)); SHR(16, R(EDI), Imm8(10));
CMP(16, R(ESI), R(EDI)); CMP(16, R(ESI), R(EDI));
FixupBranch not_equal = J_CC(CC_NE); FixupBranch not_equal = J_CC(CC_NE);
ext_dmem_read(g_dsp.r[dreg]); ext_dmem_read(dreg);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX));
FixupBranch after = J(); // else FixupBranch after = J(); // else
SetJumpTarget(not_equal); SetJumpTarget(not_equal);
ext_dmem_read(g_dsp.r[DSP_REG_AR3]); ext_dmem_read(DSP_REG_AR3);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX));
SetJumpTarget(after); SetJumpTarget(after);
@ -417,7 +417,7 @@ void DSPEmitter::ldm(const UDSPInstruction opc)
u8 sreg = opc & 0x3; u8 sreg = opc & 0x3;
if (sreg != DSP_REG_AR3) { if (sreg != DSP_REG_AR3) {
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[(dreg << 1) + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[(dreg << 1) + DSP_REG_AXL0]), R(EAX));
// if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) { // if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
@ -427,18 +427,18 @@ void DSPEmitter::ldm(const UDSPInstruction opc)
SHR(16, R(EDI), Imm8(10)); SHR(16, R(EDI), Imm8(10));
CMP(16, R(ESI), R(EDI)); CMP(16, R(ESI), R(EDI));
FixupBranch not_equal = J_CC(CC_NE); FixupBranch not_equal = J_CC(CC_NE);
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX)); MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX));
FixupBranch after = J(); FixupBranch after = J();
SetJumpTarget(not_equal); // else SetJumpTarget(not_equal); // else
ext_dmem_read(g_dsp.r[DSP_REG_AR3]); ext_dmem_read(DSP_REG_AR3);
MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX)); MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX));
SetJumpTarget(after); SetJumpTarget(after);
increment_addr_reg(sreg); increment_addr_reg(sreg);
} else { } else {
ext_dmem_read(g_dsp.r[dreg]); ext_dmem_read(dreg);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXH0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXH0]), R(EAX));
//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) { //if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
@ -448,11 +448,11 @@ void DSPEmitter::ldm(const UDSPInstruction opc)
SHR(16, R(EDI), Imm8(10)); SHR(16, R(EDI), Imm8(10));
CMP(16, R(ESI), R(EDI)); CMP(16, R(ESI), R(EDI));
FixupBranch not_equal = J_CC(CC_NE); FixupBranch not_equal = J_CC(CC_NE);
ext_dmem_read(g_dsp.r[dreg]); ext_dmem_read(dreg);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX));
FixupBranch after = J(); // else FixupBranch after = J(); // else
SetJumpTarget(not_equal); SetJumpTarget(not_equal);
ext_dmem_read(g_dsp.r[DSP_REG_AR3]); ext_dmem_read(DSP_REG_AR3);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX));
SetJumpTarget(after); SetJumpTarget(after);
@ -471,7 +471,7 @@ void DSPEmitter::ldnm(const UDSPInstruction opc)
u8 sreg = opc & 0x3; u8 sreg = opc & 0x3;
if (sreg != DSP_REG_AR3) { if (sreg != DSP_REG_AR3) {
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[(dreg << 1) + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[(dreg << 1) + DSP_REG_AXL0]), R(EAX));
// if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) { // if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
@ -481,17 +481,17 @@ void DSPEmitter::ldnm(const UDSPInstruction opc)
SHR(16, R(EDI), Imm8(10)); SHR(16, R(EDI), Imm8(10));
CMP(16, R(ESI), R(EDI)); CMP(16, R(ESI), R(EDI));
FixupBranch not_equal = J_CC(CC_NE); FixupBranch not_equal = J_CC(CC_NE);
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX)); MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX));
FixupBranch after = J(); FixupBranch after = J();
SetJumpTarget(not_equal); // else SetJumpTarget(not_equal); // else
ext_dmem_read(g_dsp.r[DSP_REG_AR3]); ext_dmem_read(DSP_REG_AR3);
MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX)); MOV(16, M(&g_dsp.r[(rreg << 1) + DSP_REG_AXL1]), R(EAX));
SetJumpTarget(after); SetJumpTarget(after);
increase_addr_reg(sreg); increase_addr_reg(sreg);
} else { } else {
ext_dmem_read(g_dsp.r[dreg]); ext_dmem_read(dreg);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXH0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXH0]), R(EAX));
//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) { //if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
@ -501,11 +501,11 @@ void DSPEmitter::ldnm(const UDSPInstruction opc)
SHR(16, R(EDI), Imm8(10)); SHR(16, R(EDI), Imm8(10));
CMP(16, R(ESI), R(EDI)); CMP(16, R(ESI), R(EDI));
FixupBranch not_equal = J_CC(CC_NE); FixupBranch not_equal = J_CC(CC_NE);
ext_dmem_read(g_dsp.r[dreg]); ext_dmem_read(dreg);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX));
FixupBranch after = J(); // else FixupBranch after = J(); // else
SetJumpTarget(not_equal); SetJumpTarget(not_equal);
ext_dmem_read(g_dsp.r[DSP_REG_AR3]); ext_dmem_read(DSP_REG_AR3);
MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX)); MOV(16, M(&g_dsp.r[rreg + DSP_REG_AXL0]), R(EAX));
SetJumpTarget(after); SetJumpTarget(after);
@ -524,7 +524,7 @@ void DSPEmitter::pushExtValueFromReg(u16 dreg, u16 sreg) {
} }
void DSPEmitter::pushExtValueFromMem(u16 dreg, u16 sreg) { void DSPEmitter::pushExtValueFromMem(u16 dreg, u16 sreg) {
ext_dmem_read(g_dsp.r[sreg]); ext_dmem_read(sreg);
MOV(16, R(EBX), R(EAX)); MOV(16, R(EBX), R(EAX));
storeIndex = dreg; storeIndex = dreg;

View File

@ -246,7 +246,9 @@ void DSPEmitter::decrease_addr_reg(int reg)
SetJumpTarget(end); SetJumpTarget(end);
} }
// EAX - destination address (g_dsp.r[dest])
// ECX - value (g_dsp.r[src])
// ESI - the upper bits of the address (>> 12)
void DSPEmitter::ext_dmem_write(u32 dest, u32 src) void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
{ {
// u16 addr = g_dsp.r[dest]; // u16 addr = g_dsp.r[dest];
@ -282,10 +284,13 @@ void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
SetJumpTarget(end); SetJumpTarget(end);
} }
// EAX should have the return value // EAX - the result of the read (used by caller)
// ECX - the address to read
// ESI - the upper bits of the address (>> 12)
void DSPEmitter::ext_dmem_read(u16 addr) void DSPEmitter::ext_dmem_read(u16 addr)
{ {
MOVZX(32, 16, ECX, M(&addr)); // u16 addr = g_dsp.r[addr];
MOVZX(32, 16, ECX, M(&g_dsp.r[addr]));
// u16 saddr = addr >> 12; // u16 saddr = addr >> 12;
MOV(32, R(ESI), R(ECX)); MOV(32, R(ESI), R(ECX));
@ -312,6 +317,7 @@ void DSPEmitter::ext_dmem_read(u16 addr)
FixupBranch ifx = J_CC(CC_NZ); FixupBranch ifx = J_CC(CC_NZ);
// return g_dsp.coef[addr & DSP_COEF_MASK]; // return g_dsp.coef[addr & DSP_COEF_MASK];
AND(16, R(ECX), Imm16(DSP_COEF_MASK)); AND(16, R(ECX), Imm16(DSP_COEF_MASK));
SHL(16, R(ECX), Imm8(1)); // * sizeof(u16)
#ifdef _M_X64 #ifdef _M_X64
MOV(64, R(R11), Imm64((u64)g_dsp.dram)); MOV(64, R(R11), Imm64((u64)g_dsp.dram));
ADD(64, R(ECX), R(R11)); ADD(64, R(ECX), R(R11));