DSPLLE - 2 new opcodes (TSTPROD,MULAXH)
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5104 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -82,7 +82,7 @@ void mv(const UDSPInstruction& opc)
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u8 sreg = opc.hex & 0x3;
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u8 sreg = opc.hex & 0x3;
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u8 dreg = ((opc.hex >> 2) & 0x3);
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u8 dreg = ((opc.hex >> 2) & 0x3);
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writeToBackLog(0, dreg + DSP_REG_AXL0, g_dsp.r[sreg + DSP_REG_ACC0]);
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writeToBackLog(0, dreg + DSP_REG_AXL0, g_dsp.r[sreg + DSP_REG_ACL0]);
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}
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}
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// S @$D, $acD.l
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// S @$D, $acD.l
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@ -92,7 +92,7 @@ void mv(const UDSPInstruction& opc)
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void s(const UDSPInstruction& opc)
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void s(const UDSPInstruction& opc)
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{
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{
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u8 dreg = opc.hex & 0x3;
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u8 dreg = opc.hex & 0x3;
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u8 sreg = ((opc.hex >> 3) & 0x3) + DSP_REG_ACC0;
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u8 sreg = ((opc.hex >> 3) & 0x3) + DSP_REG_ACL0;
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dsp_dmem_write(g_dsp.r[dreg], g_dsp.r[sreg]);
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dsp_dmem_write(g_dsp.r[dreg], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_increment_addr_reg(dreg));
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writeToBackLog(0, dreg, dsp_increment_addr_reg(dreg));
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@ -105,7 +105,7 @@ void s(const UDSPInstruction& opc)
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void sn(const UDSPInstruction& opc)
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void sn(const UDSPInstruction& opc)
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{
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{
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u8 dreg = opc.hex & 0x3;
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u8 dreg = opc.hex & 0x3;
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u8 sreg = ((opc.hex >> 3) & 0x3) + DSP_REG_ACC0;
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u8 sreg = ((opc.hex >> 3) & 0x3) + DSP_REG_ACL0;
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dsp_dmem_write(g_dsp.r[dreg], g_dsp.r[sreg]);
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dsp_dmem_write(g_dsp.r[dreg], g_dsp.r[sreg]);
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@ -161,6 +161,8 @@ void andf(const UDSPInstruction& opc);
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void xori(const UDSPInstruction& opc);
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void xori(const UDSPInstruction& opc);
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void andi(const UDSPInstruction& opc);
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void andi(const UDSPInstruction& opc);
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void ori(const UDSPInstruction& opc);
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void ori(const UDSPInstruction& opc);
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void mulaxh(const UDSPInstruction& opc);
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void tstprod(const UDSPInstruction& opc);
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// FIXME inside
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// FIXME inside
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void srbith(const UDSPInstruction& opc);
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void srbith(const UDSPInstruction& opc);
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@ -224,11 +224,11 @@ const DSPOPCTemplate opcodes[] =
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//8
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//8
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{"NX", 0x8000, 0xf700, DSPInterpreter::nx, nop, 1 | P_EXT, 0, {}, true},
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{"NX", 0x8000, 0xf700, DSPInterpreter::nx, nop, 1 | P_EXT, 0, {}, true},
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{"CLR", 0x8100, 0xf700, DSPInterpreter::clr, nop, 1 | P_EXT, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true}, // clear acc0
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{"CLR", 0x8100, 0xf700, DSPInterpreter::clr, nop, 1 | P_EXT, 1, {{P_ACC, 1, 0, 11, 0x0800}}, true},
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{"CMP", 0x8200, 0xff00, DSPInterpreter::cmp, nop, 1 | P_EXT, 0, {}, true},
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{"CMP", 0x8200, 0xff00, DSPInterpreter::cmp, nop, 1 | P_EXT, 0, {}, true},
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//0x8300 - unknown - not used atm - could be cmp(acc1-acc0)
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{"MULAXH", 0x8300, 0xff00, DSPInterpreter::mulaxh, nop, 1 | P_EXT, 0, {}, true},
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{"CLRP", 0x8400, 0xff00, DSPInterpreter::clrp, nop, 1 | P_EXT, 0, {}, true},
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{"CLRP", 0x8400, 0xff00, DSPInterpreter::clrp, nop, 1 | P_EXT, 0, {}, true},
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//0x8500 - unknown mul opcode (modifies prod regs) - not used atm
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{"TSTPROD", 0x8500, 0xff00, DSPInterpreter::tstprod, nop, 1 | P_EXT, 0, {}, true},
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{"TSTAXH", 0x8600, 0xfe00, DSPInterpreter::tstaxh, nop, 1 | P_EXT, 1, {{P_REG1A, 1, 0, 8, 0x0100}}, true},
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{"TSTAXH", 0x8600, 0xfe00, DSPInterpreter::tstaxh, nop, 1 | P_EXT, 1, {{P_REG1A, 1, 0, 8, 0x0100}}, true},
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{"M2", 0x8a00, 0xff00, DSPInterpreter::srbith, nop, 1 | P_EXT, 0, {}, true},
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{"M2", 0x8a00, 0xff00, DSPInterpreter::srbith, nop, 1 | P_EXT, 0, {}, true},
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{"M0", 0x8b00, 0xff00, DSPInterpreter::srbith, nop, 1 | P_EXT, 0, {}, true},
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{"M0", 0x8b00, 0xff00, DSPInterpreter::srbith, nop, 1 | P_EXT, 0, {}, true},
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@ -158,6 +158,25 @@ void movpz(const UDSPInstruction& opc)
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Update_SR_Register64(acc);
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Update_SR_Register64(acc);
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}
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}
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// MULAXH
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// 1000 0011 xxxx xxxx
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// Multiply $ax0.h by $ax0.h
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void mulaxh(const UDSPInstruction& opc)
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{
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s64 prod = dsp_multiply(dsp_get_ax_h(0), dsp_get_ax_h(0));
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zeroWriteBackLog();
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dsp_set_long_prod(prod);
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}
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// TSTPROD
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// 1000 0101 xxxx xxxx
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// Test prod regs value.
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void tstprod(const UDSPInstruction& opc)
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{
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s64 prod = dsp_get_long_prod();
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Update_SR_Register64(prod);
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zeroWriteBackLog();
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}
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// MULC $acS.m, $axT.h
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// MULC $acS.m, $axT.h
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// 110s t000 xxxx xxxx
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// 110s t000 xxxx xxxx
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