From 73fbfc1d66bfb50e7c9109d220f71097163ef16c Mon Sep 17 00:00:00 2001 From: magumagu9 Date: Wed, 4 Feb 2009 12:39:55 +0000 Subject: [PATCH] JitIL: Disable a couple debugging printfs, and some misc cleanup. No functionality change. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2107 8ced0084-cf51-0410-be5f-012b33b47a6e --- Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp | 4 ++-- .../Src/PowerPC/Jit64IL/Jit_FloatingPoint.cpp | 8 +++++++- .../Core/Src/PowerPC/Jit64IL/Jit_Integer.cpp | 8 +++++++- .../Src/PowerPC/Jit64IL/Jit_LoadStore.cpp | 3 +++ .../PowerPC/Jit64IL/Jit_LoadStoreFloating.cpp | 19 ++++++++----------- .../PowerPC/Jit64IL/Jit_LoadStorePaired.cpp | 5 +++++ .../PowerPC/Jit64IL/Jit_SystemRegisters.cpp | 6 ++++++ 7 files changed, 38 insertions(+), 15 deletions(-) diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp index a0ebd65a9c..044b20e7bf 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp @@ -2074,8 +2074,8 @@ static void DoWriteCode(IRBuilder* ibuild, Jit64* Jit, bool UseProfile) { } } - if (!RI.MakeProfile && RI.numSpills) - printf("Block: %x, numspills %d\n", Jit->js.blockStart, RI.numSpills); + //if (!RI.MakeProfile && RI.numSpills) + // printf("Block: %x, numspills %d\n", Jit->js.blockStart, RI.numSpills); Jit->UD2(); } diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_FloatingPoint.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_FloatingPoint.cpp index dd1acb9989..71faca31fc 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_FloatingPoint.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_FloatingPoint.cpp @@ -26,8 +26,12 @@ #include "JitCache.h" #include "JitRegCache.h" +//#define INSTRUCTION_START Default(inst); return; +#define INSTRUCTION_START + void Jit64::fp_arith_s(UGeckoInstruction inst) { + INSTRUCTION_START if (inst.Rc || (inst.SUBOP5 != 25 && inst.SUBOP5 != 20 && inst.SUBOP5 != 21)) { Default(inst); return; } @@ -61,6 +65,7 @@ void Jit64::fmaddXX(UGeckoInstruction inst) { + INSTRUCTION_START if (inst.Rc) { Default(inst); return; } @@ -84,6 +89,7 @@ void Jit64::fmrx(UGeckoInstruction inst) { + INSTRUCTION_START if (inst.Rc) { Default(inst); return; } @@ -94,7 +100,7 @@ void Jit64::fcmpx(UGeckoInstruction inst) { - printf("fcmpx at %x\n", js.compilerPC); + INSTRUCTION_START IREmitter::InstLoc lhs, rhs, res; lhs = ibuild.EmitLoadFReg(inst.FA); rhs = ibuild.EmitLoadFReg(inst.FB); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_Integer.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_Integer.cpp index a6031d870b..2cfcebb985 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_Integer.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_Integer.cpp @@ -259,6 +259,8 @@ void Jit64::mulhwux(UGeckoInstruction inst) { + Default(inst); return; +#if 0 if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITIntegerOff) {Default(inst); return;} // turn off from debugger @@ -286,12 +288,13 @@ } else { MOV(32, gpr.R(d), R(EDX)); } +#endif } // skipped some of the special handling in here - if we get crashes, let the interpreter handle this op void Jit64::divwux(UGeckoInstruction inst) { Default(inst); return; - +#if 0 int a = inst.RA, b = inst.RB, d = inst.RD; gpr.FlushLockX(EDX); gpr.Lock(a, b, d); @@ -310,6 +313,7 @@ if (inst.Rc) { CALL((u8*)asm_routines.computeRc); } +#endif } u32 Helper_Mask(u8 mb, u8 me) @@ -335,6 +339,7 @@ void Jit64::addex(UGeckoInstruction inst) { Default(inst); return; +#if 0 // USES_XER if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITIntegerOff) {Default(inst); return;} // turn off from debugger @@ -359,6 +364,7 @@ { CALL((u8*)asm_routines.computeRc); } +#endif } void Jit64::rlwinmx(UGeckoInstruction inst) diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStore.cpp index e6f6ebc992..b897977164 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStore.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStore.cpp @@ -118,6 +118,8 @@ void Jit64::lXzx(UGeckoInstruction inst) // Zero cache line. void Jit64::dcbz(UGeckoInstruction inst) { + Default(inst); return; +#if 0 if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITLoadStoreOff) {Default(inst); return;} // turn off from debugger INSTRUCTION_START; @@ -134,6 +136,7 @@ void Jit64::dcbz(UGeckoInstruction inst) MOVAPS(MDisp(EAX, (u32)Memory::base), XMM0); MOVAPS(MDisp(EAX, (u32)Memory::base + 16), XMM0); #endif +#endif } void Jit64::stX(UGeckoInstruction inst) diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStoreFloating.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStoreFloating.cpp index 0c13c4e05d..4a6f5ed783 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStoreFloating.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStoreFloating.cpp @@ -36,24 +36,16 @@ #include "JitAsm.h" #include "JitRegCache.h" -// pshufb todo: MOVQ -const u8 GC_ALIGNED16(bswapShuffle1x4[16]) = {3, 2, 1, 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; -const u8 GC_ALIGNED16(bswapShuffle2x4[16]) = {3, 2, 1, 0, 7, 6, 5, 4, 8, 9, 10, 11, 12, 13, 14, 15}; -const u8 GC_ALIGNED16(bswapShuffle1x8[16]) = {7, 6, 5, 4, 3, 2, 1, 0, 8, 9, 10, 11, 12, 13, 14, 15}; -const u8 GC_ALIGNED16(bswapShuffle1x8Dupe[16]) = {7, 6, 5, 4, 3, 2, 1, 0, 7, 6, 5, 4, 3, 2, 1, 0}; -const u8 GC_ALIGNED16(bswapShuffle2x8[16]) = {7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8}; +//#define INSTRUCTION_START Default(inst); return; +#define INSTRUCTION_START -namespace { - -u64 GC_ALIGNED16(temp64); -u32 GC_ALIGNED16(temp32); -} // TODO: Add peephole optimizations for multiple consecutive lfd/lfs/stfd/stfs since they are so common, // and pshufb could help a lot. // Also add hacks for things like lfs/stfs the same reg consecutively, that is, simple memory moves. void Jit64::lfs(UGeckoInstruction inst) { + INSTRUCTION_START IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val; if (inst.RA) addr = ibuild.EmitAdd(addr, ibuild.EmitLoadGReg(inst.RA)); @@ -65,6 +57,7 @@ void Jit64::lfs(UGeckoInstruction inst) void Jit64::lfd(UGeckoInstruction inst) { + INSTRUCTION_START IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val; if (inst.RA) addr = ibuild.EmitAdd(addr, ibuild.EmitLoadGReg(inst.RA)); @@ -77,6 +70,7 @@ void Jit64::lfd(UGeckoInstruction inst) void Jit64::stfd(UGeckoInstruction inst) { + INSTRUCTION_START IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val = ibuild.EmitLoadFReg(inst.RS); if (inst.RA) @@ -90,6 +84,7 @@ void Jit64::stfd(UGeckoInstruction inst) void Jit64::stfs(UGeckoInstruction inst) { + INSTRUCTION_START IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val = ibuild.EmitLoadFReg(inst.RS); if (inst.RA) @@ -104,6 +99,7 @@ void Jit64::stfs(UGeckoInstruction inst) void Jit64::stfsx(UGeckoInstruction inst) { + INSTRUCTION_START IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), val = ibuild.EmitLoadFReg(inst.RS); if (inst.RA) @@ -116,6 +112,7 @@ void Jit64::stfsx(UGeckoInstruction inst) void Jit64::lfsx(UGeckoInstruction inst) { + INSTRUCTION_START IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), val; if (inst.RA) addr = ibuild.EmitAdd(addr, ibuild.EmitLoadGReg(inst.RA)); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStorePaired.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStorePaired.cpp index 40c774bc55..38257a76d7 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStorePaired.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_LoadStorePaired.cpp @@ -37,10 +37,14 @@ #include "JitAsm.h" #include "JitRegCache.h" +//#define INSTRUCTION_START Default(inst); return; +#define INSTRUCTION_START + // The big problem is likely instructions that set the quantizers in the same block. // We will have to break block after quantizers are written to. void Jit64::psq_st(UGeckoInstruction inst) { + INSTRUCTION_START if (inst.W) {Default(inst); return;} IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val; if (inst.RA) @@ -54,6 +58,7 @@ void Jit64::psq_st(UGeckoInstruction inst) void Jit64::psq_l(UGeckoInstruction inst) { + INSTRUCTION_START if (inst.W) {Default(inst); return;} IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12), val; if (inst.RA) diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_SystemRegisters.cpp index 5ee975a482..431ac625c1 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_SystemRegisters.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/Jit_SystemRegisters.cpp @@ -96,6 +96,8 @@ void Jit64::mfcr(UGeckoInstruction inst) { + Default(inst); return; +#if 0 if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITSystemRegistersOff) {Default(inst); return;} // turn off from debugger INSTRUCTION_START; @@ -110,10 +112,13 @@ } OR(8, R(EAX), M(&PowerPC::ppcState.cr_fast[7])); MOV(32, gpr.R(d), R(EAX)); +#endif } void Jit64::mtcrf(UGeckoInstruction inst) { + Default(inst); return; +#if 0 if(Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITSystemRegistersOff) {Default(inst); return;} // turn off from debugger INSTRUCTION_START; @@ -147,4 +152,5 @@ OR(32, R(EAX), R(ECX)); MOV(32, M(&PowerPC::ppcState.cr), R(EAX)); } +#endif }