Jit_Integer: rlwinmx: Use BEXTR where possible
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@ -1534,6 +1534,7 @@ void Jit64::rlwinmx(UGeckoInstruction inst)
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{
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{
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const bool left_shift = inst.SH && inst.MB == 0 && inst.ME == 31 - inst.SH;
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const bool left_shift = inst.SH && inst.MB == 0 && inst.ME == 31 - inst.SH;
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const bool right_shift = inst.SH && inst.ME == 31 && inst.MB == 32 - inst.SH;
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const bool right_shift = inst.SH && inst.ME == 31 && inst.MB == 32 - inst.SH;
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const bool field_extract = inst.SH && inst.ME == 31 && inst.MB > 32 - inst.SH;
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const u32 mask = MakeRotationMask(inst.MB, inst.ME);
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const u32 mask = MakeRotationMask(inst.MB, inst.ME);
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const bool simple_mask = mask == 0xff || mask == 0xffff;
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const bool simple_mask = mask == 0xff || mask == 0xffff;
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// In case of a merged branch, track whether or not we've set flags.
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// In case of a merged branch, track whether or not we've set flags.
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@ -1565,6 +1566,13 @@ void Jit64::rlwinmx(UGeckoInstruction inst)
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SHL(32, Ra, Imm8(inst.SH));
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SHL(32, Ra, Imm8(inst.SH));
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needs_sext = inst.SH + mask_size >= 32;
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needs_sext = inst.SH + mask_size >= 32;
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}
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}
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// Use BEXTR where possible: Only AMD implements this in one uop
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else if (field_extract && cpu_info.bBMI1 && cpu_info.vendor == CPUVendor::AMD)
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{
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MOV(32, R(RSCRATCH), Imm32((mask_size << 8) | (32 - inst.SH)));
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BEXTR(32, Ra, Rs, RSCRATCH);
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needs_sext = false;
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}
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else
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else
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{
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{
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if (a != s)
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if (a != s)
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