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Merge pull request #8831 from Tilka/dsp 

DSP/Interpreter: simplify opcode table by masking
This commit is contained in:
Pierre Bourdon 2020-05-24 16:57:14 +02:00 committed by GitHub
parent a660033e8c aaa19acbd0
commit 72de202a05
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GPG Key ID: 4AEE18F83AFDEB23
6 changed files with 14 additions and 109 deletions
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4
Source/Core/Core/DSP/DSPTables.cpp
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@ -21,7 +21,7 @@ namespace DSP
// clang-format off
const std::array<DSPOPCTemplate, 214> s_opcodes =
{{
// # of parameters----+ {type, size, loc, lshift, mask} branch reads PC // instruction approximation
// # of parameters----+ {type, size, loc, lshift, mask} branch reads PC // instruction approximation
// name opcode mask size-V V param 1 param 2 param 3 extendable uncond. updates SR
{"NOP", 0x0000, 0xfffc, 1, 0, {}, false, false, false, false, false}, // no operation
@ -451,7 +451,7 @@ const std::array<pdlabel_t, 36> regnames =
{0x0c, "ST0", "Call stack",},
{0x0d, "ST1", "Data stack",},
{0x0e, "ST2", "Loop addr stack",},
{0x0f, "ST3", "Loop counter",},
{0x0f, "ST3", "Loop counter stack",},
{0x10, "AC0.H", "Accu High 0",},
{0x11, "AC1.H", "Accu High 1",},
{0x12, "CR", "Config Register",},

2
Source/Core/Core/DSP/Interpreter/DSPIntCCUtil.cpp
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@ -120,7 +120,7 @@ static bool IsOverS32()
static bool IsLess()
{
return (!(g_dsp.r.sr & SR_OVERFLOW) != !(g_dsp.r.sr & SR_SIGN));
return (g_dsp.r.sr & SR_OVERFLOW) != (g_dsp.r.sr & SR_SIGN);
}
static bool IsZero()

104
Source/Core/Core/DSP/Interpreter/DSPIntTables.cpp
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@ -21,7 +21,7 @@ struct InterpreterOpInfo
};
// clang-format off
constexpr std::array<InterpreterOpInfo, 214> s_opcodes
constexpr std::array<InterpreterOpInfo, 124> s_opcodes
{{
{0x0000, 0xfffc, nop},
@ -32,109 +32,19 @@ constexpr std::array<InterpreterOpInfo, 214> s_opcodes
{0x0021, 0xffff, halt},
{0x02d0, 0xffff, ret},
{0x02d1, 0xffff, ret},
{0x02d2, 0xffff, ret},
{0x02d3, 0xffff, ret},
{0x02d4, 0xffff, ret},
{0x02d5, 0xffff, ret},
{0x02d6, 0xffff, ret},
{0x02d7, 0xffff, ret},
{0x02d8, 0xffff, ret},
{0x02d9, 0xffff, ret},
{0x02da, 0xffff, ret},
{0x02db, 0xffff, ret},
{0x02dc, 0xffff, ret},
{0x02dd, 0xffff, ret},
{0x02de, 0xffff, ret},
{0x02df, 0xffff, ret},
{0x02d0, 0xfff0, ret},
{0x02ff, 0xffff, rti},
{0x02b0, 0xffff, call},
{0x02b1, 0xffff, call},
{0x02b2, 0xffff, call},
{0x02b3, 0xffff, call},
{0x02b4, 0xffff, call},
{0x02b5, 0xffff, call},
{0x02b6, 0xffff, call},
{0x02b7, 0xffff, call},
{0x02b8, 0xffff, call},
{0x02b9, 0xffff, call},
{0x02ba, 0xffff, call},
{0x02bb, 0xffff, call},
{0x02bc, 0xffff, call},
{0x02bd, 0xffff, call},
{0x02be, 0xffff, call},
{0x02bf, 0xffff, call},
{0x02b0, 0xfff0, call},
{0x0270, 0xffff, ifcc},
{0x0271, 0xffff, ifcc},
{0x0272, 0xffff, ifcc},
{0x0273, 0xffff, ifcc},
{0x0274, 0xffff, ifcc},
{0x0275, 0xffff, ifcc},
{0x0276, 0xffff, ifcc},
{0x0277, 0xffff, ifcc},
{0x0278, 0xffff, ifcc},
{0x0279, 0xffff, ifcc},
{0x027a, 0xffff, ifcc},
{0x027b, 0xffff, ifcc},
{0x027c, 0xffff, ifcc},
{0x027d, 0xffff, ifcc},
{0x027e, 0xffff, ifcc},
{0x027f, 0xffff, ifcc},
{0x0270, 0xfff0, ifcc},
{0x0290, 0xffff, jcc},
{0x0291, 0xffff, jcc},
{0x0292, 0xffff, jcc},
{0x0293, 0xffff, jcc},
{0x0294, 0xffff, jcc},
{0x0295, 0xffff, jcc},
{0x0296, 0xffff, jcc},
{0x0297, 0xffff, jcc},
{0x0298, 0xffff, jcc},
{0x0299, 0xffff, jcc},
{0x029a, 0xffff, jcc},
{0x029b, 0xffff, jcc},
{0x029c, 0xffff, jcc},
{0x029d, 0xffff, jcc},
{0x029e, 0xffff, jcc},
{0x029f, 0xffff, jcc},
{0x0290, 0xfff0, jcc},
{0x1700, 0xff1f, jmprcc},
{0x1701, 0xff1f, jmprcc},
{0x1702, 0xff1f, jmprcc},
{0x1703, 0xff1f, jmprcc},
{0x1704, 0xff1f, jmprcc},
{0x1705, 0xff1f, jmprcc},
{0x1706, 0xff1f, jmprcc},
{0x1707, 0xff1f, jmprcc},
{0x1708, 0xff1f, jmprcc},
{0x1709, 0xff1f, jmprcc},
{0x170a, 0xff1f, jmprcc},
{0x170b, 0xff1f, jmprcc},
{0x170c, 0xff1f, jmprcc},
{0x170d, 0xff1f, jmprcc},
{0x170e, 0xff1f, jmprcc},
{0x170f, 0xff1f, jmprcc},
{0x1700, 0xff10, jmprcc},
{0x1710, 0xff1f, callr},
{0x1711, 0xff1f, callr},
{0x1712, 0xff1f, callr},
{0x1713, 0xff1f, callr},
{0x1714, 0xff1f, callr},
{0x1715, 0xff1f, callr},
{0x1716, 0xff1f, callr},
{0x1717, 0xff1f, callr},
{0x1718, 0xff1f, callr},
{0x1719, 0xff1f, callr},
{0x171a, 0xff1f, callr},
{0x171b, 0xff1f, callr},
{0x171c, 0xff1f, callr},
{0x171d, 0xff1f, callr},
{0x171e, 0xff1f, callr},
{0x171f, 0xff1f, callr},
{0x1710, 0xff10, callr},
{0x1200, 0xff00, sbclr},
{0x1300, 0xff00, sbset},

6
Source/Core/Core/HLE/HLE.cpp
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@ -27,12 +27,6 @@ typedef void (*TPatchFunction)();
static std::map<u32, u32> s_original_instructions;
enum
{
HLE_RETURNTYPE_BLR = 0,
HLE_RETURNTYPE_RFI = 1,
};
struct SPatch
{
char m_szPatchName[128];

4
Source/Core/Core/HW/DSPHLE/UCodes/UCodes.cpp
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@ -186,8 +186,8 @@ void UCodeInterface::PrepareBootUCode(u32 mail)
if (SConfig::GetInstance().m_DumpUCode)
{
DSP::DumpDSPCode(static_cast<u8*>(Memory::GetPointer(m_next_ucode.iram_mram_addr)),
m_next_ucode.iram_size, ector_crc);
DSP::DumpDSPCode(Memory::GetPointer(m_next_ucode.iram_mram_addr), m_next_ucode.iram_size,
ector_crc);
}
DEBUG_LOG(DSPHLE, "PrepareBootUCode 0x%08x", ector_crc);

3
Source/Core/Core/HW/DSPLLE/DSPLLE.cpp
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@ -265,7 +265,8 @@ void DSPLLE::DSP_WriteMailBoxHigh(bool cpu_mailbox, u16 value)
{
if (gdsp_mbox_peek(MAILBOX_CPU) & 0x80000000)
{
ERROR_LOG(DSPLLE, "Mailbox isn't empty ... strange");
// the DSP didn't read the previous value
WARN_LOG(DSPLLE, "Mailbox isn't empty ... strange");
}
#if PROFILE