Merge pull request #9478 from JosJuice/double-assert-attempt-2
JitArm64: Fix false positive "turned singles into doubles" asserts
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commit
7290cd0032
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@ -120,11 +120,13 @@ void JitArm64::fp_arith(UGeckoInstruction inst)
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}
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}
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ASSERT_MSG(DYNA_REC, inputs_are_singles == inputs_are_singles_func(),
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"Register allocation turned singles into doubles in the middle of fp_arith");
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if (single || packed)
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{
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ASSERT_MSG(DYNA_REC, inputs_are_singles == inputs_are_singles_func(),
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"Register allocation turned singles into doubles in the middle of fp_arith");
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fpr.FixSinglePrecision(d);
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}
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}
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void JitArm64::fp_logic(UGeckoInstruction inst)
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@ -219,7 +221,7 @@ void JitArm64::fselx(UGeckoInstruction inst)
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const u32 d = inst.FD;
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const bool a_single = fpr.IsSingle(a, true);
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if (fpr.IsSingle(a, true))
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if (a_single)
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{
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const ARM64Reg VA = fpr.R(a, RegType::LowerPairSingle);
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m_float_emit.FCMPE(EncodeRegToSingle(VA));
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@ -230,6 +232,9 @@ void JitArm64::fselx(UGeckoInstruction inst)
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m_float_emit.FCMPE(EncodeRegToDouble(VA));
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}
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ASSERT_MSG(DYNA_REC, a_single == fpr.IsSingle(a, true),
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"Register allocation turned singles into doubles in the middle of fselx");
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const bool b_and_c_singles = fpr.IsSingle(b, true) && fpr.IsSingle(c, true);
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const RegType type = b_and_c_singles ? RegType::LowerPairSingle : RegType::LowerPair;
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const auto reg_encoder = b_and_c_singles ? EncodeRegToSingle : EncodeRegToDouble;
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@ -240,9 +245,7 @@ void JitArm64::fselx(UGeckoInstruction inst)
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m_float_emit.FCSEL(reg_encoder(VD), reg_encoder(VC), reg_encoder(VB), CC_GE);
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ASSERT_MSG(DYNA_REC,
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a_single == fpr.IsSingle(a, true) &&
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b_and_c_singles == (fpr.IsSingle(b, true) && fpr.IsSingle(c, true)),
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ASSERT_MSG(DYNA_REC, b_and_c_singles == (fpr.IsSingle(b, true) && fpr.IsSingle(c, true)),
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"Register allocation turned singles into doubles in the middle of fselx");
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}
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