Jit64: merge tri_op into fp_tri_op
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@ -137,13 +137,11 @@ public:
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void MultiplyImmediate(u32 imm, int a, int d, bool overflow);
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void tri_op(int d, int a, int b, bool reversible, void (XEmitter::*avxOp)(Gen::X64Reg, Gen::X64Reg, Gen::OpArg),
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void (Gen::XEmitter::*sseOp)(Gen::X64Reg, Gen::OpArg), UGeckoInstruction inst, bool roundRHS = false);
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typedef u32 (*Operation)(u32 a, u32 b);
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void regimmop(int d, int a, bool binary, u32 value, Operation doop, void (Gen::XEmitter::*op)(int, const Gen::OpArg&, const Gen::OpArg&),
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bool Rc = false, bool carry = false);
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void fp_tri_op(int d, int a, int b, bool reversible, bool single, void (Gen::XEmitter::*avxOp)(Gen::X64Reg, Gen::X64Reg, Gen::OpArg),
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void (Gen::XEmitter::*sseOp)(Gen::X64Reg, Gen::OpArg), UGeckoInstruction inst, bool packed = false, bool roundRHS = false);
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void (Gen::XEmitter::*sseOp)(Gen::X64Reg, Gen::OpArg), bool packed = false, bool roundRHS = false);
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void FloatCompare(UGeckoInstruction inst, bool upper = false);
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// OPCODES
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@ -16,7 +16,7 @@ static const u64 GC_ALIGNED16(psAbsMask[2]) = {0x7FFFFFFFFFFFFFFFULL, 0xFFFFFFF
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static const double GC_ALIGNED16(half_qnan_and_s32_max[2]) = {0x7FFFFFFF, -0x80000};
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void Jit64::fp_tri_op(int d, int a, int b, bool reversible, bool single, void (XEmitter::*avxOp)(X64Reg, X64Reg, OpArg),
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void (XEmitter::*sseOp)(X64Reg, OpArg), UGeckoInstruction inst, bool packed, bool roundRHS)
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void (XEmitter::*sseOp)(X64Reg, OpArg), bool packed, bool roundRHS)
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{
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fpr.Lock(d, a, b);
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fpr.BindToRegister(d, d == a || d == b || !single);
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@ -80,13 +80,13 @@ void Jit64::fp_arith(UGeckoInstruction inst)
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switch (inst.SUBOP5)
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{
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case 18: fp_tri_op(d, a, b, false, single, packed ? &XEmitter::VDIVPD : &XEmitter::VDIVSD,
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packed ? &XEmitter::DIVPD : &XEmitter::DIVSD, inst, packed); break;
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packed ? &XEmitter::DIVPD : &XEmitter::DIVSD, packed); break;
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case 20: fp_tri_op(d, a, b, false, single, packed ? &XEmitter::VSUBPD : &XEmitter::VSUBSD,
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packed ? &XEmitter::SUBPD : &XEmitter::SUBSD, inst, packed); break;
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packed ? &XEmitter::SUBPD : &XEmitter::SUBSD, packed); break;
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case 21: fp_tri_op(d, a, b, true, single, packed ? &XEmitter::VADDPD : &XEmitter::VADDSD,
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packed ? &XEmitter::ADDPD : &XEmitter::ADDSD, inst, packed); break;
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packed ? &XEmitter::ADDPD : &XEmitter::ADDSD, packed); break;
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case 25: fp_tri_op(d, a, c, true, single, packed ? &XEmitter::VMULPD : &XEmitter::VMULSD,
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packed ? &XEmitter::MULPD : &XEmitter::MULSD, inst, packed, round_input); break;
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packed ? &XEmitter::MULPD : &XEmitter::MULSD, packed, round_input); break;
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default:
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_assert_msg_(DYNA_REC, 0, "fp_arith WTF!!!");
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}
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@ -56,34 +56,6 @@ void Jit64::ps_sign(UGeckoInstruction inst)
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fpr.UnlockAll();
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}
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//There's still a little bit more optimization that can be squeezed out of this
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void Jit64::tri_op(int d, int a, int b, bool reversible, void (XEmitter::*avxOp)(X64Reg, X64Reg, OpArg), void (XEmitter::*sseOp)(X64Reg, OpArg), UGeckoInstruction inst, bool roundRHS)
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{
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fpr.Lock(d, a, b);
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fpr.BindToRegister(d, d == a || d == b);
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if (roundRHS)
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{
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if (d == a)
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{
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Force25BitPrecision(XMM0, fpr.R(b), XMM1);
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(this->*sseOp)(fpr.RX(d), R(XMM0));
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}
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else
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{
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Force25BitPrecision(fpr.RX(d), fpr.R(b), XMM0);
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(this->*sseOp)(fpr.RX(d), fpr.R(a));
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}
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}
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else
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{
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avx_op(avxOp, sseOp, fpr.RX(d), fpr.R(a), fpr.R(b), true, reversible);
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}
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ForceSinglePrecision(fpr.RX(d), fpr.R(d));
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SetFPRFIfNeeded(fpr.RX(d));
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fpr.UnlockAll();
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}
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void Jit64::ps_arith(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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@ -94,16 +66,16 @@ void Jit64::ps_arith(UGeckoInstruction inst)
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switch (inst.SUBOP5)
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{
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case 18: // div
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tri_op(inst.FD, inst.FA, inst.FB, false, &XEmitter::VDIVPD, &XEmitter::DIVPD, inst);
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fp_tri_op(inst.FD, inst.FA, inst.FB, false, true, &XEmitter::VDIVPD, &XEmitter::DIVPD, true);
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break;
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case 20: // sub
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tri_op(inst.FD, inst.FA, inst.FB, false, &XEmitter::VSUBPD, &XEmitter::SUBPD, inst);
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fp_tri_op(inst.FD, inst.FA, inst.FB, false, true, &XEmitter::VSUBPD, &XEmitter::SUBPD, true);
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break;
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case 21: // add
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tri_op(inst.FD, inst.FA, inst.FB, true, &XEmitter::VADDPD, &XEmitter::ADDPD, inst);
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fp_tri_op(inst.FD, inst.FA, inst.FB, true, true, &XEmitter::VADDPD, &XEmitter::ADDPD, true);
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break;
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case 25: // mul
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tri_op(inst.FD, inst.FA, inst.FC, true, &XEmitter::VMULPD, &XEmitter::MULPD, inst, round_input);
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fp_tri_op(inst.FD, inst.FA, inst.FC, true, true, &XEmitter::VMULPD, &XEmitter::MULPD, true, round_input);
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break;
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default:
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_assert_msg_(DYNA_REC, 0, "ps_arith WTF!!!");
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