Jit_Integer: arithXex
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@ -1399,8 +1399,6 @@ void Jit64::arithXex(UGeckoInstruction inst)
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int d = inst.RD;
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bool same_input_sub = !add && regsource && a == b;
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gpr.Lock(a, b, d);
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gpr.BindToRegister(d, !same_input_sub && (d == a || d == b));
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if (!js.carryFlagSet)
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JitGetAndClearCAOV(inst.OE);
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else
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@ -1410,45 +1408,56 @@ void Jit64::arithXex(UGeckoInstruction inst)
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// Special case: subfe A, B, B is a common compiler idiom
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if (same_input_sub)
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{
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RCX64Reg Rd = gpr.Bind(d, RCMode::Write);
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RegCache::Realize(Rd);
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// Convert carry to borrow
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if (!js.carryFlagInverted)
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CMC();
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SBB(32, gpr.R(d), gpr.R(d));
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SBB(32, Rd, Rd);
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invertedCarry = true;
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}
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else if (!add && regsource && d == b)
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{
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RCOpArg Ra = gpr.Use(a, RCMode::Read);
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RCX64Reg Rd = gpr.Bind(d, RCMode::ReadWrite);
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RegCache::Realize(Ra, Rd);
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if (!js.carryFlagInverted)
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CMC();
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SBB(32, gpr.R(d), gpr.R(a));
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SBB(32, Rd, Ra);
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invertedCarry = true;
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}
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else
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{
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OpArg source = regsource ? gpr.R(d == b ? a : b) : Imm32(mex ? 0xFFFFFFFF : 0);
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RCOpArg Ra = gpr.Use(a, RCMode::Read);
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RCOpArg Rb = gpr.Use(b, RCMode::Read);
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RCX64Reg Rd = gpr.Bind(d, RCMode::Write);
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RCOpArg source =
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regsource ? gpr.Use(d == b ? a : b, RCMode::Read) : RCOpArg::Imm32(mex ? 0xFFFFFFFF : 0);
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RegCache::Realize(Ra, Rb, Rd, source);
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if (d != a && d != b)
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MOV(32, gpr.R(d), gpr.R(a));
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MOV(32, Rd, Ra);
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if (!add)
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NOT(32, gpr.R(d));
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NOT(32, Rd);
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// if the source is an immediate, we can invert carry by going from add -> sub and doing src =
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// -1 - src
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if (js.carryFlagInverted && source.IsImm())
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{
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source = Imm32(-1 - source.SImm32());
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SBB(32, gpr.R(d), source);
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SBB(32, Rd, Imm32(-1 - source.SImm32()));
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invertedCarry = true;
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}
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else
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{
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if (js.carryFlagInverted)
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CMC();
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ADC(32, gpr.R(d), source);
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ADC(32, Rd, source);
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}
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}
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FinalizeCarryOverflow(inst.OE, invertedCarry);
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if (inst.Rc)
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ComputeRC(gpr.R(d));
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gpr.UnlockAll();
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ComputeRC(d);
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}
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void Jit64::arithcx(UGeckoInstruction inst)
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