Merge pull request #1844 from Tilka/sse_mov
x64Emitter: fix MOVLPD/MOVHPD
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6bc274a968
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@ -60,10 +60,10 @@ enum NormalSSEOps
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sseMOVAPtoRM = 0x29, //MOVAP to RM
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sseMOVUPfromRM = 0x10, //MOVUP from RM
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sseMOVUPtoRM = 0x11, //MOVUP to RM
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sseMOVLPDfromRM= 0x12,
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sseMOVLPDtoRM = 0x13,
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sseMOVHPDfromRM= 0x16,
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sseMOVHPDtoRM = 0x17,
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sseMOVLPfromRM = 0x12,
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sseMOVLPtoRM = 0x13,
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sseMOVHPfromRM = 0x16,
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sseMOVHPtoRM = 0x17,
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sseMOVHLPS = 0x12,
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sseMOVLHPS = 0x16,
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sseMOVDQfromRM = 0x6F,
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@ -1552,10 +1552,15 @@ void XEmitter::MOVSD(X64Reg regOp, OpArg arg) {WriteSSEOp(0xF2, sseMOVUPfromRM
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void XEmitter::MOVSS(OpArg arg, X64Reg regOp) {WriteSSEOp(0xF3, sseMOVUPtoRM, regOp, arg);}
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void XEmitter::MOVSD(OpArg arg, X64Reg regOp) {WriteSSEOp(0xF2, sseMOVUPtoRM, regOp, arg);}
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void XEmitter::MOVLPD(X64Reg regOp, OpArg arg) {WriteSSEOp(0xF2, sseMOVLPDfromRM, regOp, arg);}
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void XEmitter::MOVHPD(X64Reg regOp, OpArg arg) {WriteSSEOp(0xF2, sseMOVHPDfromRM, regOp, arg);}
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void XEmitter::MOVLPD(OpArg arg, X64Reg regOp) {WriteSSEOp(0xF2, sseMOVLPDtoRM, regOp, arg);}
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void XEmitter::MOVHPD(OpArg arg, X64Reg regOp) {WriteSSEOp(0xF2, sseMOVHPDtoRM, regOp, arg);}
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void XEmitter::MOVLPS(X64Reg regOp, OpArg arg) {WriteSSEOp(0x00, sseMOVLPfromRM, regOp, arg);}
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void XEmitter::MOVLPD(X64Reg regOp, OpArg arg) {WriteSSEOp(0x66, sseMOVLPfromRM, regOp, arg);}
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void XEmitter::MOVLPS(OpArg arg, X64Reg regOp) {WriteSSEOp(0x00, sseMOVLPtoRM, regOp, arg);}
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void XEmitter::MOVLPD(OpArg arg, X64Reg regOp) {WriteSSEOp(0x66, sseMOVLPtoRM, regOp, arg);}
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void XEmitter::MOVHPS(X64Reg regOp, OpArg arg) {WriteSSEOp(0x00, sseMOVHPfromRM, regOp, arg);}
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void XEmitter::MOVHPD(X64Reg regOp, OpArg arg) {WriteSSEOp(0x66, sseMOVHPfromRM, regOp, arg);}
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void XEmitter::MOVHPS(OpArg arg, X64Reg regOp) {WriteSSEOp(0x00, sseMOVHPtoRM, regOp, arg);}
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void XEmitter::MOVHPD(OpArg arg, X64Reg regOp) {WriteSSEOp(0x66, sseMOVHPtoRM, regOp, arg);}
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void XEmitter::MOVHLPS(X64Reg regOp1, X64Reg regOp2) {WriteSSEOp(0x00, sseMOVHLPS, regOp1, R(regOp2));}
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void XEmitter::MOVLHPS(X64Reg regOp1, X64Reg regOp2) {WriteSSEOp(0x00, sseMOVLHPS, regOp1, R(regOp2));}
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@ -615,9 +615,14 @@ public:
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void MOVSS(OpArg arg, X64Reg regOp);
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void MOVSD(OpArg arg, X64Reg regOp);
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void MOVLPS(X64Reg regOp, OpArg arg);
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void MOVLPD(X64Reg regOp, OpArg arg);
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void MOVHPD(X64Reg regOp, OpArg arg);
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void MOVLPS(OpArg arg, X64Reg regOp);
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void MOVLPD(OpArg arg, X64Reg regOp);
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void MOVHPS(X64Reg regOp, OpArg arg);
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void MOVHPD(X64Reg regOp, OpArg arg);
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void MOVHPS(OpArg arg, X64Reg regOp);
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void MOVHPD(OpArg arg, X64Reg regOp);
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void MOVHLPS(X64Reg regOp1, X64Reg regOp2);
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@ -728,9 +728,44 @@ TWO_OP_SSE_TEST(UCOMISS, "dword")
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TWO_OP_SSE_TEST(COMISD, "qword")
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TWO_OP_SSE_TEST(UCOMISD, "qword")
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// register-only instructions
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#define TWO_OP_SSE_REG_TEST(Name, MemBits) \
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TEST_F(x64EmitterTest, Name) \
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{ \
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for (const auto& r1 : xmmnames) \
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{ \
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for (const auto& r2 : xmmnames) \
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{ \
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emitter->Name(r1.reg, r2.reg); \
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ExpectDisassembly(#Name " " + r1.name + ", " + r2.name); \
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} \
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} \
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}
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TWO_OP_SSE_REG_TEST(MOVHLPS, "qword")
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TWO_OP_SSE_REG_TEST(MOVLHPS, "qword")
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// "register + memory"-only instructions
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#define TWO_OP_SSE_MEM_TEST(Name, MemBits) \
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TEST_F(x64EmitterTest, Name) \
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{ \
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for (const auto& r1 : xmmnames) \
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{ \
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emitter->Name(r1.reg, MatR(R12)); \
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ExpectDisassembly(#Name " " + r1.name + ", " MemBits " ptr ds:[r12]"); \
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emitter->Name(MatR(R12), r1.reg); \
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ExpectDisassembly(#Name " " MemBits " ptr ds:[r12], " + r1.name); \
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} \
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}
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TWO_OP_SSE_MEM_TEST(MOVLPS, "qword")
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TWO_OP_SSE_MEM_TEST(MOVHPS, "qword")
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TWO_OP_SSE_MEM_TEST(MOVLPD, "qword")
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TWO_OP_SSE_MEM_TEST(MOVHPD, "qword")
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// TODO: CMPSS/SD
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// TODO: SHUFPS/PD
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// TODO: SSE MOVs
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// TODO: more SSE MOVs
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// TODO: MOVMSK
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TEST_F(x64EmitterTest, MASKMOVDQU)
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