Adding Current BBA code. Very much thanks from Masken of Whinecube. Doesn't work yet, so it's disabled saying it's not present. Byte swap problems for it not working? Will continue working. Someone in Windows needs to add the files to the project.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@1480 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
Sonicadvance1
parent
514826f282
commit
6b6aa1bb17
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@ -44,9 +44,7 @@ void Init()
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g_Channels[0].AddDevice(EXIDEVICE_MEMORYCARD_A, 0);
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g_Channels[0].AddDevice(EXIDEVICE_IPL, 1);
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g_Channels[1].AddDevice(EXIDEVICE_MEMORYCARD_B, 0);
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#if 0
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g_Channels[0].AddDevice(EXIDEVICE_ETH, 2);
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#endif
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//g_Channels[1].AddDevice(EXIDEVICE_MIC, 0);
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g_Channels[2].AddDevice(EXIDEVICE_AD16, 0);
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}
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@ -22,9 +22,7 @@
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#include "EXI_DeviceMemoryCard.h"
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#include "EXI_DeviceAD16.h"
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#include "EXI_DeviceMic.h"
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#if 0
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#include "EXI_DeviceEthernet.h"
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#endif
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#include "../Core.h"
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@ -153,9 +151,7 @@ IEXIDevice* EXIDevice_Create(TEXIDevices _EXIDevice)
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break;
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case EXIDEVICE_ETH:
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#if 0
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return new CEXIETHERNET();
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#endif
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break;
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}
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@ -28,10 +28,17 @@ enum {
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unsigned int Expecting;
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CEXIETHERNET::CEXIETHERNET() :
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m_uPosition(0),
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m_uCommand(0)
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m_uCommand(0),
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mWriteBuffer(2000)
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{
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ID = 0x04020200;
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mWriteP = INVALID_P;
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mReadP = INVALID_P;
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mExpectSpecialImmRead = false;
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Expecting = EXPECT_NONE;
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mExpectVariableLengthImmWrite = false;
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}
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void CEXIETHERNET::SetCS(int cs)
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@ -45,7 +52,7 @@ void CEXIETHERNET::SetCS(int cs)
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bool CEXIETHERNET::IsPresent()
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{
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return true;
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return false;
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}
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void CEXIETHERNET::Update()
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@ -56,63 +63,225 @@ bool CEXIETHERNET::IsInterruptSet()
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{
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return false;
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}
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void CEXIETHERNET::Transfer(u8& _byte)
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{
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//printf("%x %x POS: %d\n", _byte, m_uCommand, m_uPosition);
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//printf("%x %x \n", _byte, m_uCommand);
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if (m_uPosition == 0)
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{
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m_uCommand = _byte;
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}
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else
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{
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switch(m_uCommand)
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{
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case CMD_ID: // ID
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if (m_uPosition != 1)
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_byte = (u8)(ID >> (24-(((m_uPosition-2) & 3) * 8)));
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break;
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case CMD_READ_REG: // Read from Register
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// Size is 2
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// Todo, Actually read it
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break;
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default:
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printf("Unknown CMD 0x%x\n", m_uCommand);
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exit(0);
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break;
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}
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}
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m_uPosition++;
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}
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bool isActivated()
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{
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// Todo: Return actual check
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return true;
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}
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inline u8 makemaskb(int start, int end) {
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return (u8)_rotl((2 << (end - start)) - 1, 7 - end);
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}
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inline u32 makemaskh(int start, int end) {
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return (u32)_rotl((2 << (end - start)) - 1, 15 - end);
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}
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inline u32 makemaskw(int start, int end) {
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return _rotl((2 << (end - start)) - 1, 31 - end);
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}
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inline u8 getbitsb(u8 byte, int start, int end) {
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return (byte & makemaskb(start, end)) >> u8(7 - end);
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}
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inline u32 getbitsh(u32 hword, int start, int end) {
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return (hword & makemaskh(start, end)) >> u32(15 - end);
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}
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inline u32 getbitsw(u32 dword, int start, int end) {
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return (dword & makemaskw(start, end)) >> (31 - end);
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}
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void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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{
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printf("IMM Write, size 0x%x, data 0x%x\n", _uSize, _uData);
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while (_uSize--)
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if(mExpectVariableLengthImmWrite)
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{
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u8 uByte = _uData >> 24;
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this->Transfer(uByte);
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_uData <<= 8;
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printf("Not doing expecting variable length imm write!\n");
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exit(0);
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}
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else if(mWriteP != INVALID_P)
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{
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if(mWriteP + _uSize > BBAMEM_SIZE)
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{
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printf("Write error: mWriteP + size = 0x%04X + %i\n", mWriteP, _uSize);
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exit(0);
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}
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//BBADEGUB("Write to BBA address 0x%0*X, %i byte%s: 0x%0*X\n",mWriteP >= CB_OFFSET ? 4 : 2, mWriteP, size, (size==1?"":"s"), size*2, data);
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switch(mWriteP)
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{
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case 0x09:
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printf("mWriteP is %x\n", mWriteP);
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exit(0);
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//BBADEGUB("BBA Interrupt reset 0x%02X & ~(0x%02X) => 0x%02X\n", mBbaMem[0x09], MAKE(BYTE, data), mBbaMem[0x09] & ~MAKE(BYTE, data));
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//MYASSERT(_uSize == 1);
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//mBbaMem[0x09] &= ~MAKE(BYTE, data);
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break;
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case BBA_NCRA:
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printf("mWriteP is %x\n", mWriteP);
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exit(0);
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/*#define RISE(flags) ((data & (flags)) && !(mBbaMem[0x00] & (flags)))
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if(RISE(BBA_NCRA_RESET))
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{
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printf("BBA Reset\n");
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}
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if(RISE(BBA_NCRA_SR) && isActivated())
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{
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BBADEGUB("BBA Start Recieve\n");
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HWGLE(startRecv());
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}
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if(RISE(BBA_NCRA_ST1))
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{
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BBADEGUB("BBA Start Transmit\n");
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if(!mReadyToSend)
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throw hardware_fatal_exception("BBA Transmit without a packet!");
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HWGLE(sendPacket(mWriteBuffer.p(), mWriteBuffer.size()));
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mReadyToSend = false;
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}
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mBbaMem[0x00] = MAKE(BYTE, data);*/
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break;
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case BBA_NWAYC:
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printf("mWriteP is %x\n", mWriteP);
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exit(0);
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/*if(data & (BBA_NWAYC_ANE | BBA_NWAYC_ANS_RA))
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{
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HWGLE(activate());
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//say we've successfully negotiated for 10 Mbit full duplex
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//should placate libogc
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mBbaMem[BBA_NWAYS] = BBA_NWAYS_LS10 | BBA_NWAYS_LPNWAY |
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BBA_NWAYS_ANCLPT | BBA_NWAYS_10TXF;
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}*/
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break;
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case 0x18: //RRP - Receive Buffer Read Page Pointer
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printf("mWriteP is %x\n", mWriteP);
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exit(0);
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/*MYASSERT(size == 2 || size == 1);
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mRBRPP = (BYTE)data << 8; //I hope this works with both write sizes.
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mRBEmpty = mRBRPP == ((WORD)mCbw.p_write() + CB_OFFSET);
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HWGLE(checkRecvBuffer());*/
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break;
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case 0x16: //RWP
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printf("mWriteP is %x\n", mWriteP);
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exit(0);
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/*MYASSERT(size == 2 || size == 1);
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MYASSERT(data == DWORD((WORD)mCbw.p_write() + CB_OFFSET) >> 8);*/
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break;
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default:
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printf("Default one!\n");
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memcpy(mBbaMem + mWriteP, &_uData, _uSize);
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mWriteP = mWriteP + _uSize;
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}
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return;
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}else if(_uSize == 2 && _uData == 0)
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{
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// Device ID Request
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mSpecialImmData = EXI_DEVTYPE_ETHER;
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mExpectSpecialImmRead = true;
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return;
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}
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else if((_uSize == 4 && (_uData & 0xC0000000) == 0xC0000000) || (_uSize == 2 && (_uData & 0x4000) == 0x4000))
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{ // Write to BBA Register
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printf("Write to BBA register!\n");
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if(_uSize == 4)
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mWriteP = (u8)getbitsw(_uData, 16, 23);
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else //size == 2
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mWriteP = (u8)getbitsw(_uData & ~0x4000, 16, 23); //Dunno about this...
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if(mWriteP == 0x48)
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{
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mWriteBuffer.clear();
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mExpectVariableLengthImmWrite = true;
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printf("Prepared for variable length write to address 0x48\n");
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}
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else
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{
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//BBADEGUB("BBA Write pointer set to 0x%0*X\n", size, mWriteP);
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}
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return;
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}
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else if((_uSize == 4 && (_uData & 0xC0000000) == 0x80000000) || (_uSize == 2 && (_uData & 0x4000) == 0x0000))
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{
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printf("Read from BBA register!\n");
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// Read from BBA Register!
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if(_uSize == 4)
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{
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//Holy Fuck that's crazy
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mReadP = (u32)getbitsw(_uData, 8, 23);
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if(mReadP >= BBAMEM_SIZE)
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{
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printf("Illegal BBA address: 0x%04X\n", mReadP);
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//if(g::bouehr)
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exit(0);
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//return EXI_UNHANDLED;
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}
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}
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else
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{ //size == 2
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mReadP = (u8)getbitsw(_uData, 16, 23);
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}
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switch(mReadP)
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{
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case 0x20: //MAC address
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printf("Mac Address!\n");
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exit(0);
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//memcpy(mBbaMem + mReadP, g::mac_address, 6);
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break;
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case 0x01: //Revision ID
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break;
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case 0x16: //RWP - Receive Buffer Write Page Pointer
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printf("RWP!\n");
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exit(0);
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//MAKE(WORD, mBbaMem[mReadP]) = ((WORD)mCbw.p_write() + CB_OFFSET) >> 8;
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break;
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case 0x18: //RRP - Receive Buffer Read Page Pointer
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printf("RRP!\n");
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exit(0);
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//MAKE(WORD, mBbaMem[mReadP]) = (mRBRPP) >> 8;
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break;
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case 0x3A: //bit 1 set if no data available
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printf("Bit 1 set!\n");
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exit(0);
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//mBbaMem[mReadP] = !mRBEmpty;
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break;
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case 0x00:
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//mBbaMem[mReadP] = 0x00;
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//if(!sendInProgress())
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mBbaMem[mReadP] &= ~(0x06);
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break;
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case 0x03:
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mBbaMem[mReadP] = 0x80;
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break;
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}
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//BBADEGUB("BBA Read pointer set to 0x%0*X\n", size, mReadP);
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return;
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}
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printf("Not expecting ImmWrite of size %d\n", _uSize);
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exit(0);
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}
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u32 CEXIETHERNET::ImmRead(u32 _uSize)
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{
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u32 uResult = 0;
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u32 uPosition = 0;
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printf("IMM Read, size 0x%x\n", _uSize);
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while (_uSize--)
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{
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u8 uByte = 0;
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this->Transfer(uByte);
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uResult |= uByte << (24-(uPosition++ * 8));
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if(mExpectSpecialImmRead) {
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printf("special IMMRead\n");
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mExpectSpecialImmRead = false;
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return mSpecialImmData;
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}
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return uResult;
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if(mReadP != INVALID_P)
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{
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if(mReadP + _uSize > BBAMEM_SIZE)
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{
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printf("Read error: mReadP + size = 0x%04X + %i\n", mReadP, _uSize);
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exit(0);
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}
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u32 uResult = 0;
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memcpy(&uResult, mBbaMem + mReadP, _uSize);
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// We do as well?
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//data = swapw(data); //we have a byteswap problem...
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printf("Read from BBA address 0x%0*X, %i byte%s: 0x%0*X\n",mReadP >= CB_OFFSET ? 4 : 2, mReadP, _uSize, (_uSize==1?"":"s"),_uSize*2, getbitsw(uResult, 0, _uSize * 8 - 1));
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mReadP = mReadP + _uSize;
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return uResult;
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}
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else
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{
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printf("Unhandled IMM read of %d bytes\n", _uSize);
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}
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printf("Not Expecting IMMRead of size %d!\n", _uSize);
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exit(0);
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}
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void CEXIETHERNET::DMAWrite(u32 _uAddr, u32 _uSize)
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@ -18,6 +18,32 @@
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#ifndef _EXIDEVICE_ETHERNET_H
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#define _EXIDEVICE_ETHERNET_H
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class WriteBuffer {
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public:
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WriteBuffer(u32 s) :_size(0) { _buffer = (u8*)malloc(s*sizeof(u8)); ucapacity = s;}
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~WriteBuffer() { free(_buffer);}
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u32 size() const { return _size; }
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u32 capacity() const { return ucapacity; }
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void write(u32 s, const void *src) {
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if(_size + s >= ucapacity)
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{
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printf("Write too large!");
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exit(0);
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}
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memcpy(_buffer + _size, src, s);
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_size = _size + s;
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}
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void clear() {
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_size = 0;
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}
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u8* const p() { return _buffer; }
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private:
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u8* _buffer;
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u32 ucapacity;
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u32 _size;
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};
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class CEXIETHERNET : public IEXIDevice
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{
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public:
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@ -35,6 +61,19 @@ private:
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// STATE_TO_SAVE
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u32 m_uPosition;
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u32 m_uCommand;
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u32 mWriteP, mReadP;
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#define INVALID_P 0xFFFF
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bool mExpectSpecialImmRead; //reset to false on deselect
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u32 mSpecialImmData;
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#define BBAMEM_SIZE 0x1000
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u8 mBbaMem[BBAMEM_SIZE];
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WriteBuffer mWriteBuffer;
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bool mExpectVariableLengthImmWrite;
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bool mReadyToSend;
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unsigned int ID;
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u8 RegisterBlock[0x1000];
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@ -43,6 +82,47 @@ private:
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CMD_READ_REG = 0x01,
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};
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void Transfer(u8& _uByte);
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};
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#define CB_OFFSET 0x100
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#define CB_SIZE (BBAMEM_SIZE - CB_OFFSET)
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#define SIZEOF_RECV_DESCRIPTOR 4
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#define EXI_DEVTYPE_ETHER 0x04020200
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#define BBA_NCRA 0x00 /* Network Control Register A, RW */
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#define BBA_NCRA_RESET (1<<0) /* RESET */
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#define BBA_NCRA_ST0 (1<<1) /* ST0, Start transmit command/status */
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#define BBA_NCRA_ST1 (1<<2) /* ST1, " */
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#define BBA_NCRA_SR (1<<3) /* SR, Start Receive */
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#define BBA_NCRB 0x01 /* Network Control Register B, RW */
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#define BBA_NCRB_PR (1<<0) /* PR, Promiscuous Mode */
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#define BBA_NCRB_CA (1<<1) /* CA, Capture Effect Mode */
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#define BBA_NCRB_PM (1<<2) /* PM, Pass Multicast */
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#define BBA_NCRB_PB (1<<3) /* PB, Pass Bad Frame */
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#define BBA_NCRB_AB (1<<4) /* AB, Accept Broadcast */
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#define BBA_NCRB_HBD (1<<5) /* HBD, reserved */
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#define BBA_NCRB_RXINTC0 (1<<6) /* RXINTC, Receive Interrupt Counter */
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#define BBA_NCRB_RXINTC1 (1<<7) /* " */
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#define BBA_NCRB_1_PACKET_PER_INT (0<<6) /* 0 0 */
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#define BBA_NCRB_2_PACKETS_PER_INT (1<<6) /* 0 1 */
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#define BBA_NCRB_4_PACKETS_PER_INT (2<<6) /* 1 0 */
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#define BBA_NCRB_8_PACKETS_PER_INT (3<<6) /* 1 1 */
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#define BBA_NWAYC 0x30 /* NWAY Configuration Register, RW, 84h */
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#define BBA_NWAYC_FD (1<<0) /* FD, Full Duplex Mode */
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#define BBA_NWAYC_PS100 (1<<1) /* PS100/10, Port Select 100/10 */
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#define BBA_NWAYC_ANE (1<<2) /* ANE, Autonegotiation Enable */
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#define BBA_NWAYC_ANS_RA (1<<3) /* ANS, Restart Autonegotiation */
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#define BBA_NWAYC_LTE (1<<7) /* LTE, Link Test Enable */
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#define BBA_NWAYS 0x31
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#define BBA_NWAYS_LS10 (1<<0)
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#define BBA_NWAYS_LS100 (1<<1)
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#define BBA_NWAYS_LPNWAY (1<<2)
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#define BBA_NWAYS_ANCLPT (1<<3)
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#define BBA_NWAYS_100TXF (1<<4)
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#define BBA_NWAYS_100TXH (1<<5)
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#define BBA_NWAYS_10TXF (1<<6)
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#define BBA_NWAYS_10TXH (1<<7)
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#endif
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|
|||
|
|
@ -38,7 +38,7 @@ files = ["Console.cpp",
|
|||
"HW/EXI_DeviceAD16.cpp",
|
||||
"HW/EXI_DeviceMemoryCard.cpp",
|
||||
"HW/EXI_DeviceMic.cpp",
|
||||
# "HW/EXI_DeviceEthernet.cpp",
|
||||
"HW/EXI_DeviceEthernet.cpp",
|
||||
"HW/GPFifo.cpp",
|
||||
"HW/HW.cpp",
|
||||
"HW/Memmap.cpp",
|
||||
|
|
|
|||
Loading…
Reference in New Issue