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Merge pull request #13166 from Sintendo/stX-opt 

JitArm64_LoadStore: Optimize zero stores in stX
This commit is contained in:
JosJuice 2024-12-08 11:06:33 +01:00 committed by GitHub
parent 57b1234feb a307d9d9b8
commit 687fe65709
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GPG Key ID: B5690EEEBB952194
2 changed files with 8 additions and 1 deletions
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3
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
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@ -181,7 +181,8 @@ void JitArm64::SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s
if (!jo.fastmem)
gpr.Lock(ARM64Reg::W0);
ARM64Reg RS = gpr.R(value);
// Don't materialize zero.
ARM64Reg RS = gpr.IsImm(value, 0) ? ARM64Reg::WZR : gpr.R(value);
ARM64Reg reg_dest = ARM64Reg::INVALID_REG;
ARM64Reg reg_off = ARM64Reg::INVALID_REG;

6
Source/Core/Core/PowerPC/JitArm64/Jit_Util.cpp
View File

@ -257,6 +257,12 @@ void ByteswapAfterLoad(ARM64XEmitter* emit, ARM64FloatEmitter* float_emit, ARM64
ARM64Reg ByteswapBeforeStore(ARM64XEmitter* emit, ARM64FloatEmitter* float_emit, ARM64Reg tmp_reg,
ARM64Reg src_reg, u32 flags, bool want_reversed)
{
// Byteswapping zero is still zero.
// We'd typically expect a writable register to be passed in, but recognize
// WZR for optimization purposes.
if ((flags & BackPatchInfo::FLAG_FLOAT) == 0 && src_reg == ARM64Reg::WZR)
return ARM64Reg::WZR;
ARM64Reg dst_reg = src_reg;
if (want_reversed == !(flags & BackPatchInfo::FLAG_REVERSE))