diff --git a/Source/Core/Core/Src/DSP/DSPAccelerator.cpp b/Source/Core/Core/Src/DSP/DSPAccelerator.cpp
index a45ab15e9d..b1452c249c 100644
--- a/Source/Core/Core/Src/DSP/DSPAccelerator.cpp
+++ b/Source/Core/Core/Src/DSP/DSPAccelerator.cpp
@@ -101,6 +101,8 @@ void dsp_write_aram_d3(u16 value)
 {
 	// Zelda ucode writes a bunch of zeros to ARAM through d3 during
 	// initialization.  Don't know if it ever does it later, too.
+	// Pikmin 2 Wii writes non-stop to 0x10008000-0x1000801f (non-zero values too)
+	// Zelda TP WII writes non-stop to 0x10000000-0x1000001f (non-zero values too)
 	u32 Address = (g_dsp.ifx_regs[DSP_ACCAH] << 16) | g_dsp.ifx_regs[DSP_ACCAL];
 
 	switch (g_dsp.ifx_regs[DSP_FORMAT]) {
diff --git a/Source/Core/Core/Src/HW/DSP.cpp b/Source/Core/Core/Src/HW/DSP.cpp
index 07b2a5e1d3..af267bb5dd 100644
--- a/Source/Core/Core/Src/HW/DSP.cpp
+++ b/Source/Core/Core/Src/HW/DSP.cpp
@@ -727,7 +727,7 @@ void Do_ARAM_DMA()
 // (LM) It just means that dsp reads via '0xffdd' on WII can end up in EXRAM or main RAM
 u8 ReadARAM(u32 _iAddress)
 {
-	//NOTICE_LOG(DSPINTERFACE, "ReadARAM 0x%08x (0x%08x)", _iAddress, _iAddress & (0x10000000 | g_ARAM.mask));
+	//NOTICE_LOG(DSPINTERFACE, "ReadARAM 0x%08x", _iAddress);
 	if (g_ARAM.wii_mode)
 		return g_ARAM.ptr[(_iAddress & 0x10000000)?(_iAddress & 0x13ffffff):(_iAddress & 0x01ffffff)];
 	else
@@ -736,8 +736,11 @@ u8 ReadARAM(u32 _iAddress)
 
 void WriteARAM(u8 value, u32 _uAddress)
 {
-	//NOTICE_LOG(DSPINTERFACE, "WriteARAM 0x%08x (0x%08x)", _uAddress, _uAddress & g_ARAM.mask);
-	g_ARAM.ptr[_uAddress & g_ARAM.mask] = value;
+	//NOTICE_LOG(DSPINTERFACE, "WriteARAM 0x%08x", _uAddress);
+	if (g_ARAM.wii_mode)
+		g_ARAM.ptr[(_uAddress & 0x10000000)?(_uAddress & 0x13ffffff):(_uAddress & 0x01ffffff)] = value;
+	else
+		g_ARAM.ptr[_uAddress & g_ARAM.mask] = value;
 }
 
 u8 *GetARAMPtr()