LLE JIT: Completed the JIT versions of the DSP Branch instructions (added ifcc, ret, rti and halt).
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6674 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
skidau
parent
9553aa0100
commit
677fd7c052
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@ -99,7 +99,7 @@ void DSPEmitter::checkExceptions(u32 retval)
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MOV(16, M(&(g_dsp.pc)), Imm16(compilePC));
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#else
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MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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MOV(16, MDisp(RAX,0), Imm16(compilePC));
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MOV(16, MatR(RAX), Imm16(compilePC));
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#endif
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ABI_CallFunction((void *)&DSPCore_CheckExceptions);
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@ -316,7 +316,7 @@ void DSPEmitter::Compile(int start_addr)
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MOV(16, M(&(g_dsp.pc)), Imm16(compilePC));
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#else
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MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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MOV(16, MDisp(RAX,0), Imm16(compilePC));
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MOV(16, MatR(RAX), Imm16(compilePC));
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#endif
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}
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@ -354,7 +354,7 @@ void DSPEmitter::Compile(int start_addr)
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MOV(16, R(AX), M(&g_dsp.pc));
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#else
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MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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MOV(16, R(AX), MDisp(RAX,0));
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MOV(16, R(AX), MatR(RAX));
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#endif
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CMP(16, R(AX), Imm16(compilePC));
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FixupBranch rNoBranch = J_CC(CC_Z);
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@ -388,7 +388,7 @@ void DSPEmitter::Compile(int start_addr)
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MOV(16, M(&(g_dsp.pc)), Imm16(compilePC));
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#else
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MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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MOV(16, MDisp(RAX,0), Imm16(compilePC));
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MOV(16, MatR(RAX), Imm16(compilePC));
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#endif
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}
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@ -132,6 +132,10 @@ public:
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void jmprcc(const UDSPInstruction opc);
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void call(const UDSPInstruction opc);
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void callr(const UDSPInstruction opc);
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void ifcc(const UDSPInstruction opc);
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void ret(const UDSPInstruction opc);
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void rti(const UDSPInstruction opc);
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void halt(const UDSPInstruction opc);
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void loop(const UDSPInstruction opc);
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void loopi(const UDSPInstruction opc);
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void bloop(const UDSPInstruction opc);
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@ -40,26 +40,26 @@ const DSPOPCTemplate opcodes[] =
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{"SUBARN", 0x000c, 0xfffc, DSPInterpreter::subarn, &DSPEmitter::subarn, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false, false, false, false, false},
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{"ADDARN", 0x0010, 0xfff0, DSPInterpreter::addarn, &DSPEmitter::addarn, 1, 2, {{P_REG, 1, 0, 0, 0x0003}, {P_REG04, 1, 0, 2, 0x000c}}, false, false, false, false, false},
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{"HALT", 0x0021, 0xffff, DSPInterpreter::halt, NULL, 1, 0, {}, false, true, true, false, false},
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{"HALT", 0x0021, 0xffff, DSPInterpreter::halt, &DSPEmitter::halt, 1, 0, {}, false, true, true, false, false},
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{"RETGE", 0x02d0, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETL", 0x02d1, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETG", 0x02d2, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETLE", 0x02d3, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETNZ", 0x02d4, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETZ", 0x02d5, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETNC", 0x02d6, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETC", 0x02d7, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETx8", 0x02d8, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETx9", 0x02d9, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETxA", 0x02da, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETxB", 0x02db, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETLNZ", 0x02dc, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETLZ", 0x02dd, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RETO", 0x02de, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, false, true, false},
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{"RET", 0x02df, 0xffff, DSPInterpreter::ret, NULL, 1, 0, {}, false, true, true, false, false},
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{"RETGE", 0x02d0, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETL", 0x02d1, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETG", 0x02d2, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETLE", 0x02d3, 0xffff, DSPInterpreter::ret, NULL/*&DSPEmitter::ret*/, 1, 0, {}, false, true, false, true, false},
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{"RETNZ", 0x02d4, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETZ", 0x02d5, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETNC", 0x02d6, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETC", 0x02d7, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETx8", 0x02d8, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETx9", 0x02d9, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETxA", 0x02da, 0xffff, DSPInterpreter::ret, NULL/*&DSPEmitter::ret*/, 1, 0, {}, false, true, false, true, false},
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{"RETxB", 0x02db, 0xffff, DSPInterpreter::ret, NULL/*&DSPEmitter::ret*/, 1, 0, {}, false, true, false, true, false},
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{"RETLNZ", 0x02dc, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETLZ", 0x02dd, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RETO", 0x02de, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, false, true, false},
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{"RET", 0x02df, 0xffff, DSPInterpreter::ret, &DSPEmitter::ret, 1, 0, {}, false, true, true, false, false},
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{"RTI", 0x02ff, 0xffff, DSPInterpreter::rti, NULL, 1, 0, {}, false, true, true, false, false},
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{"RTI", 0x02ff, 0xffff, DSPInterpreter::rti, &DSPEmitter::rti, 1, 0, {}, false, true, true, false, false},
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{"CALLGE", 0x02b0, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false},
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{"CALLL", 0x02b1, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false},
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@ -78,22 +78,22 @@ const DSPOPCTemplate opcodes[] =
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{"CALLO", 0x02be, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false},
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{"CALL", 0x02bf, 0xffff, DSPInterpreter::call, &DSPEmitter::call, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, true, true, false},
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{"IFGE", 0x0270, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFL", 0x0271, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFG", 0x0272, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFLE", 0x0273, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFNZ", 0x0274, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFZ", 0x0275, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFNC", 0x0276, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFC", 0x0277, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFx8", 0x0278, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFx9", 0x0279, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFxA", 0x027a, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFxB", 0x027b, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFLNZ", 0x027c, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFLZ", 0x027d, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IFO", 0x027e, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, false, true, false},
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{"IF", 0x027f, 0xffff, DSPInterpreter::ifcc, NULL, 1, 0, {}, false, true, true, true, false},
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{"IFGE", 0x0270, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFL", 0x0271, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFG", 0x0272, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFLE", 0x0273, 0xffff, DSPInterpreter::ifcc, NULL/*&DSPEmitter::ifcc*/, 1, 0, {}, false, true, false, true, false},
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{"IFNZ", 0x0274, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFZ", 0x0275, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFNC", 0x0276, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFC", 0x0277, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFx8", 0x0278, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFx9", 0x0279, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFxA", 0x027a, 0xffff, DSPInterpreter::ifcc, NULL/*&DSPEmitter::ifcc*/, 1, 0, {}, false, true, false, true, false},
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{"IFxB", 0x027b, 0xffff, DSPInterpreter::ifcc, NULL/*&DSPEmitter::ifcc*/, 1, 0, {}, false, true, false, true, false},
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{"IFLNZ", 0x027c, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFLZ", 0x027d, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IFO", 0x027e, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, false, true, false},
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{"IF", 0x027f, 0xffff, DSPInterpreter::ifcc, &DSPEmitter::ifcc, 1, 0, {}, false, true, true, true, false},
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{"JGE", 0x0290, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false},
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{"JL", 0x0291, 0xffff, DSPInterpreter::jcc, &DSPEmitter::jcc, 2, 1, {{P_ADDR_I, 2, 1, 0, 0xffff}}, false, true, false, true, false},
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@ -185,7 +185,7 @@ void DSPEmitter::jcc(const UDSPInstruction opc)
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MOV(16, M(&(g_dsp.pc)), Imm16(compilePC + 1));
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#else
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MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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MOV(16, MDisp(RAX,0), Imm16(compilePC + 1));
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MOV(16, MatR(RAX), Imm16(compilePC + 1));
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#endif
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ReJitConditional<r_jcc>(opc, *this);
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#endif
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@ -218,7 +218,8 @@ void DSPEmitter::jmprcc(const UDSPInstruction opc)
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void r_call(const UDSPInstruction opc, DSPEmitter& emitter)
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{
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u16 dest = dsp_imem_read(emitter.compilePC + 1);
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emitter.ABI_CallFunctionCC16((void *)dsp_reg_store_stack, DSP_STACK_C, emitter.compilePC + 2);
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emitter.MOV(16, R(DX), Imm16(emitter.compilePC + 2));
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emitter.dsp_reg_store_stack(DSP_STACK_C);
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#ifdef _M_IX86 // All32
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emitter.MOV(16, M(&(g_dsp.pc)), Imm16(dest));
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@ -230,7 +231,7 @@ void r_call(const UDSPInstruction opc, DSPEmitter& emitter)
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}
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#else
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emitter.MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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emitter.MOV(16, MDisp(RAX,0), Imm16(dest));
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emitter.MOV(16, MatR(RAX), Imm16(dest));
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// Jump directly to the called block if it has already been compiled.
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// TODO: Subtract cycles from cyclesLeft
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@ -255,7 +256,7 @@ void DSPEmitter::call(const UDSPInstruction opc)
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MOV(16, M(&(g_dsp.pc)), Imm16(compilePC + 1));
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#else
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MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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MOV(16, MDisp(RAX,0), Imm16(compilePC + 1));
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MOV(16, MatR(RAX), Imm16(compilePC + 1));
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#endif
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ReJitConditional<r_call>(opc, *this);
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}
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@ -263,7 +264,8 @@ void DSPEmitter::call(const UDSPInstruction opc)
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void r_callr(const UDSPInstruction opc, DSPEmitter& emitter)
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{
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u8 reg = (opc >> 5) & 0x7;
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emitter.ABI_CallFunctionCC16((void *)dsp_reg_store_stack, DSP_STACK_C, emitter.compilePC + 1);
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emitter.MOV(16, R(DX), Imm16(emitter.compilePC + 1));
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emitter.dsp_reg_store_stack(DSP_STACK_C);
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#ifdef _M_IX86 // All32
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emitter.MOV(16, R(EAX), M(&g_dsp.r[reg]));
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emitter.MOV(16, M(&g_dsp.pc), R(EAX));
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@ -271,7 +273,7 @@ void r_callr(const UDSPInstruction opc, DSPEmitter& emitter)
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emitter.MOV(64, R(RSI), ImmPtr(&g_dsp.r[reg]));
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emitter.MOV(16, R(RSI), MatR(RSI));
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emitter.MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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emitter.MOV(16, MDisp(RAX,0), R(RSI));
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emitter.MOV(16, MatR(RAX), R(RSI));
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#endif
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}
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// Generic callr implementation
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@ -282,9 +284,113 @@ void r_callr(const UDSPInstruction opc, DSPEmitter& emitter)
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// register $R.
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void DSPEmitter::callr(const UDSPInstruction opc)
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{
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#ifdef _M_IX86 // All32
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MOV(16, M(&g_dsp.pc), Imm16(compilePC + 1));
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#else
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MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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MOV(16, MatR(RAX), Imm16(compilePC + 1));
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#endif
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ReJitConditional<r_callr>(opc, *this);
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}
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void r_ifcc(const UDSPInstruction opc, DSPEmitter& emitter)
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{
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#ifdef _M_IX86 // All32
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emitter.MOV(16, M(&g_dsp.pc), Imm16(emitter.compilePC + 1));
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#else
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emitter.MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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emitter.MOV(16, MatR(RAX), Imm16(emitter.compilePC + 1));
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#endif
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}
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// Generic jmpr implementation
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// JMPcc $R
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// 0001 0111 rrr0 cccc
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// Jump to address; set program counter to a value from register $R.
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void DSPEmitter::ifcc(const UDSPInstruction opc)
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{
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#ifdef _M_IX86 // All32
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MOV(16, M(&g_dsp.pc), Imm16((compilePC + 1) + opTable[compilePC + 1]->size));
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#else
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MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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MOV(16, MatR(RAX), Imm16((compilePC + 1) + opTable[compilePC + 1]->size));
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#endif
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ReJitConditional<r_ifcc>(opc, *this);
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}
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void r_ret(const UDSPInstruction opc, DSPEmitter& emitter)
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{
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emitter.dsp_reg_load_stack(DSP_STACK_C);
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#ifdef _M_IX86 // All32
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emitter.MOV(16, M(&g_dsp.pc), R(DX));
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#else
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emitter.MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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emitter.MOV(16, MatR(RAX), R(DX));
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#endif
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}
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// Generic ret implementation
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// RETcc
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// 0000 0010 1101 cccc
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// Return from subroutine if condition cc has been met. Pops stored PC
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// from call stack $st0 and sets $pc to this location.
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void DSPEmitter::ret(const UDSPInstruction opc)
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{
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#ifdef _M_IX86 // All32
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MOV(16, M(&g_dsp.pc), Imm16(compilePC + 1));
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#else
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MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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MOV(16, MatR(RAX), Imm16(compilePC + 1));
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#endif
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ReJitConditional<r_ret>(opc, *this);
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}
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// RTI
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// 0000 0010 1111 1111
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// Return from exception. Pops stored status register $sr from data stack
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// $st1 and program counter PC from call stack $st0 and sets $pc to this
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// location.
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void DSPEmitter::rti(const UDSPInstruction opc)
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{
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// g_dsp.r[DSP_REG_SR] = dsp_reg_load_stack(DSP_STACK_D);
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dsp_reg_load_stack(DSP_STACK_D);
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#ifdef _M_IX86 // All32
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MOV(16, M(&g_dsp.r[DSP_REG_SR]), R(DX));
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#else
|
||||
MOV(64, R(R11), ImmPtr(&g_dsp.r));
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||||
MOV(16, MDisp(R11,DSP_REG_SR*2), R(DX));
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||||
#endif
|
||||
// g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C);
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dsp_reg_load_stack(DSP_STACK_C);
|
||||
#ifdef _M_IX86 // All32
|
||||
MOV(16, M(&g_dsp.pc), R(DX));
|
||||
#else
|
||||
MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
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||||
MOV(16, MatR(RAX), R(DX));
|
||||
#endif
|
||||
}
|
||||
|
||||
// HALT
|
||||
// 0000 0000 0020 0001
|
||||
// Stops execution of DSP code. Sets bit DSP_CR_HALT in register DREG_CR.
|
||||
void DSPEmitter::halt(const UDSPInstruction opc)
|
||||
{
|
||||
#ifdef _M_IX86 // All32
|
||||
OR(16, M(&g_dsp.cr), Imm16(4));
|
||||
#else
|
||||
MOV(64, R(RAX), ImmPtr(&g_dsp.cr));
|
||||
OR(16, MatR(RAX), Imm16(4));
|
||||
#endif
|
||||
// g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C);
|
||||
dsp_reg_load_stack(DSP_STACK_C);
|
||||
#ifdef _M_IX86 // All32
|
||||
MOV(16, M(&g_dsp.pc), R(DX));
|
||||
#else
|
||||
MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
|
||||
MOV(16, MatR(RAX), R(DX));
|
||||
#endif
|
||||
}
|
||||
|
||||
// LOOP handling: Loop stack is used to control execution of repeated blocks of
|
||||
// instructions. Whenever there is value on stack $st2 and current PC is equal
|
||||
// value at $st2, then value at stack $st3 is decremented. If value is not zero
|
||||
|
|
@ -370,7 +476,7 @@ void DSPEmitter::loop(const UDSPInstruction opc)
|
|||
MOV(16, M(&(g_dsp.pc)), Imm16(compilePC + 1));
|
||||
#else
|
||||
MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
|
||||
MOV(16, MDisp(RAX,0), Imm16(compilePC + 1));
|
||||
MOV(16, MatR(RAX), Imm16(compilePC + 1));
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -400,7 +506,7 @@ void DSPEmitter::loopi(const UDSPInstruction opc)
|
|||
MOV(16, M(&(g_dsp.pc)), Imm16(compilePC + 1));
|
||||
#else
|
||||
MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
|
||||
MOV(16, MDisp(RAX,0), Imm16(compilePC + 1));
|
||||
MOV(16, MatR(RAX), Imm16(compilePC + 1));
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
|
@ -438,7 +544,7 @@ void DSPEmitter::bloop(const UDSPInstruction opc)
|
|||
MOV(16, M(&(g_dsp.pc)), Imm16(compilePC + 2));
|
||||
#else
|
||||
MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
|
||||
MOV(16, MDisp(RAX,0), Imm16(compilePC + 2));
|
||||
MOV(16, MatR(RAX), Imm16(compilePC + 2));
|
||||
#endif
|
||||
FixupBranch exit = J();
|
||||
|
||||
|
|
@ -482,7 +588,7 @@ void DSPEmitter::bloopi(const UDSPInstruction opc)
|
|||
MOV(16, M(&(g_dsp.pc)), Imm16(compilePC + 2));
|
||||
#else
|
||||
MOV(64, R(RAX), ImmPtr(&(g_dsp.pc)));
|
||||
MOV(16, MDisp(RAX,0), Imm16(compilePC + 2));
|
||||
MOV(16, MatR(RAX), Imm16(compilePC + 2));
|
||||
#endif
|
||||
}
|
||||
else
|
||||
|
|
|
|||
Loading…
Reference in New Issue