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[AArch64] Set BindToRegister's to_load correctly for double FP ops.

This commit is contained in:
Ryan Houdek 2015-08-25 21:29:27 -05:00
parent 0666c0750b
commit 6729a36d8d
1 changed files with 13 additions and 13 deletions
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26
Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp
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@ -23,7 +23,7 @@ void JitArm64::fabsx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 b = inst.FB, d = inst.FD; u32 b = inst.FB, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == b);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
ARM64Reg VD = fpr.R(d); ARM64Reg VD = fpr.R(d);
@ -64,7 +64,7 @@ void JitArm64::faddx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 a = inst.FA, b = inst.FB, d = inst.FD; u32 a = inst.FA, b = inst.FB, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == a || d == b);
ARM64Reg VA = fpr.R(a); ARM64Reg VA = fpr.R(a);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
@ -111,7 +111,7 @@ void JitArm64::fmaddx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == a || d == b || d == c);
ARM64Reg VA = fpr.R(a); ARM64Reg VA = fpr.R(a);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
@ -138,7 +138,7 @@ void JitArm64::fmrx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 b = inst.FB, d = inst.FD; u32 b = inst.FB, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == b);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
ARM64Reg VD = fpr.R(d); ARM64Reg VD = fpr.R(d);
@ -174,7 +174,7 @@ void JitArm64::fmsubx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == a || d == b || d == c);
ARM64Reg VA = fpr.R(a); ARM64Reg VA = fpr.R(a);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
@ -218,7 +218,7 @@ void JitArm64::fmulx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 a = inst.FA, c = inst.FC, d = inst.FD; u32 a = inst.FA, c = inst.FC, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == a || d == c);
ARM64Reg VA = fpr.R(a); ARM64Reg VA = fpr.R(a);
ARM64Reg VC = fpr.R(c); ARM64Reg VC = fpr.R(c);
@ -244,7 +244,7 @@ void JitArm64::fnabsx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 b = inst.FB, d = inst.FD; u32 b = inst.FB, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == b);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
ARM64Reg VD = fpr.R(d); ARM64Reg VD = fpr.R(d);
@ -271,7 +271,7 @@ void JitArm64::fnegx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 b = inst.FB, d = inst.FD; u32 b = inst.FB, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == b);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
ARM64Reg VD = fpr.R(d); ARM64Reg VD = fpr.R(d);
@ -318,7 +318,7 @@ void JitArm64::fnmaddx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == a || d == b || d == c);
ARM64Reg VA = fpr.R(a); ARM64Reg VA = fpr.R(a);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
@ -367,7 +367,7 @@ void JitArm64::fnmsubx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == a || d == b || d == c);
ARM64Reg VA = fpr.R(a); ARM64Reg VA = fpr.R(a);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
@ -394,7 +394,7 @@ void JitArm64::fselx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == a || d == b || d == c);
ARM64Reg VD = fpr.R(d); ARM64Reg VD = fpr.R(d);
ARM64Reg VA = fpr.R(a); ARM64Reg VA = fpr.R(a);
@ -439,7 +439,7 @@ void JitArm64::fsubx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 a = inst.FA, b = inst.FB, d = inst.FD; u32 a = inst.FA, b = inst.FB, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == a || d == b);
ARM64Reg VA = fpr.R(a); ARM64Reg VA = fpr.R(a);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);
@ -601,7 +601,7 @@ void JitArm64::fdivx(UGeckoInstruction inst)
FALLBACK_IF(inst.Rc); FALLBACK_IF(inst.Rc);
u32 a = inst.FA, b = inst.FB, d = inst.FD; u32 a = inst.FA, b = inst.FB, d = inst.FD;
fpr.BindToRegister(d, true); fpr.BindToRegister(d, d == a || d == b);
ARM64Reg VA = fpr.R(a); ARM64Reg VA = fpr.R(a);
ARM64Reg VB = fpr.R(b); ARM64Reg VB = fpr.R(b);