[AArch64] Minor fix in the UMULH/SMULH.
These two instructions ignore the register encoded in to RA.
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@ -1010,9 +1010,9 @@ void ARM64XEmitter::SMSUBL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra)
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{
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EncodeData3SrcInst(3, Rd, Rn, Rm, Ra);
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}
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void ARM64XEmitter::SMULH(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra)
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void ARM64XEmitter::SMULH(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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{
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EncodeData3SrcInst(4, Rd, Rn, Rm, Ra);
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EncodeData3SrcInst(4, Rd, Rn, Rm, SP);
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}
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void ARM64XEmitter::UMADDL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra)
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{
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@ -1022,9 +1022,9 @@ void ARM64XEmitter::UMSUBL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra)
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{
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EncodeData3SrcInst(6, Rd, Rn, Rm, Ra);
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}
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void ARM64XEmitter::UMULH(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra)
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void ARM64XEmitter::UMULH(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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{
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EncodeData3SrcInst(7, Rd, Rn, Rm, Ra);
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EncodeData3SrcInst(7, Rd, Rn, Rm, SP);
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}
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void ARM64XEmitter::MUL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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{
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@ -478,10 +478,10 @@ public:
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void MSUB(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra);
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void SMADDL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra);
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void SMSUBL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra);
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void SMULH(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra);
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void SMULH(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void UMADDL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra);
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void UMSUBL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra);
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void UMULH(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, ARM64Reg Ra);
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void UMULH(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void MUL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void MNEG(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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