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JitArm64: Optimize general case of srawx 

Same approach as Jit64. A lot simpler, don't you think? :)
This commit is contained in:
JosJuice 2021-03-14 18:21:21 +01:00
parent a45a0a2066
commit 621b5b8e1a
1 changed files with 8 additions and 42 deletions
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50
Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
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@ -1456,13 +1456,12 @@ void JitArm64::srawx(UGeckoInstruction inst)
} }
CSET(WA, CC_NEQ); CSET(WA, CC_NEQ);
ComputeCarry(WA); ComputeCarry(WA);
gpr.Unlock(WA); gpr.Unlock(WA);
} }
} }
else if (!js.op->wantsCA) else
{ {
gpr.BindToRegister(a, a == b || a == s); gpr.BindToRegister(a, a == b || a == s);
@ -1472,48 +1471,15 @@ void JitArm64::srawx(UGeckoInstruction inst)
ASRV(EncodeRegTo64(WA), EncodeRegTo64(WA), EncodeRegTo64(gpr.R(b))); ASRV(EncodeRegTo64(WA), EncodeRegTo64(WA), EncodeRegTo64(gpr.R(b)));
LSR(EncodeRegTo64(gpr.R(a)), EncodeRegTo64(WA), 32); LSR(EncodeRegTo64(gpr.R(a)), EncodeRegTo64(WA), 32);
if (js.op->wantsCA)
{
TST(gpr.R(a), WA);
CSET(WA, CC_NEQ);
ComputeCarry(WA);
}
gpr.Unlock(WA); gpr.Unlock(WA);
} }
else
{
gpr.BindToRegister(a, a == b || a == s);
ARM64Reg WA = gpr.GetReg();
ARM64Reg WB = gpr.GetReg();
ARM64Reg WC = gpr.GetReg();
ARM64Reg RB = gpr.R(b);
ARM64Reg RS = gpr.R(s);
ANDI2R(WA, RB, 32);
FixupBranch bit_is_not_zero = TBNZ(RB, 5);
ANDSI2R(WC, RB, 31);
MOV(WB, RS);
FixupBranch is_zero = B(CC_EQ);
ASRV(WB, RS, WC);
FixupBranch bit_is_zero = TBZ(RS, 31);
MOVI2R(WA, 32);
SUB(WC, WA, WC);
LSLV(WC, RS, WC);
CMP(WC, 0);
CSET(WA, CC_NEQ);
FixupBranch end = B();
SetJumpTarget(bit_is_not_zero);
CMP(RS, 0);
CSET(WA, CC_LT);
CSINV(WB, ARM64Reg::WZR, ARM64Reg::WZR, CC_GE);
SetJumpTarget(is_zero);
SetJumpTarget(bit_is_zero);
SetJumpTarget(end);
MOV(gpr.R(a), WB);
ComputeCarry(WA);
gpr.Unlock(WA, WB, WC);
}
if (inst.Rc) if (inst.Rc)
ComputeRC0(gpr.R(a)); ComputeRC0(gpr.R(a));