[AArch64] Minor bugfix and optimization.
Fixes a bug in lfs where I was doing a rev64.16b when I needed to do a rev32.8b. Change a ld1r.4s to a ld1r.2s. Fix an issue where a fcvtl2 needed to be a fcvtl. Re-enabled psq_l, issue with flickering can't be reproduced anymore, so whatever.
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@ -162,9 +162,9 @@ u32 JitArm64::EmitBackpatchRoutine(ARM64XEmitter* emit, u32 flags, bool fastmem,
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trouble_offset = (emit->GetCodePtr() - code_base) / 4;
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if (flags & BackPatchInfo::FLAG_SIZE_F32)
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{
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float_emit.LD1R(32, RS, addr);
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float_emit.REV64(8, RS, RS);
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float_emit.FCVTL(64, RS, RS);
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float_emit.LD1R(32, EncodeRegToDouble(RS), addr);
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float_emit.REV32(8, EncodeRegToDouble(RS), EncodeRegToDouble(RS));
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float_emit.FCVTL(64, EncodeRegToDouble(RS), EncodeRegToDouble(RS));
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}
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else
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{
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@ -21,7 +21,6 @@ void JitArm64::psq_l(UGeckoInstruction inst)
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INSTRUCTION_START
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JITDISABLE(bJITLoadStorePairedOff);
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FALLBACK_IF(jo.memcheck || !jo.fastmem);
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FALLBACK_IF(true);
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// X30 is LR
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// X0 contains the scale
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