Change register cache to using an enum to determine flush mode.
This is easier to identify what the flush is doing rather than a "true" as argument.
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parent
541bfd071e
commit
5e1a465d50
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@ -255,7 +255,7 @@ void RegCache::BindToRegister(int i, bool doLoad, bool makeDirty)
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}
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}
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void RegCache::StoreFromRegister(int i, bool clearState)
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void RegCache::StoreFromRegister(int i, FlushMode mode)
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{
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if (regs[i].away)
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{
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@ -264,7 +264,7 @@ void RegCache::StoreFromRegister(int i, bool clearState)
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{
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X64Reg xr = RX(i);
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doStore = xregs[xr].dirty;
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if(clearState)
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if(mode == FLUSH_ALL)
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{
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xregs[xr].free = true;
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xregs[xr].ppcReg = -1;
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@ -279,7 +279,7 @@ void RegCache::StoreFromRegister(int i, bool clearState)
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OpArg newLoc = GetDefaultLocation(i);
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if (doStore)
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StoreRegister(i, newLoc);
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if(clearState)
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if(mode == FLUSH_ALL)
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{
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regs[i].location = newLoc;
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regs[i].away = false;
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@ -311,7 +311,7 @@ void FPURegCache::StoreRegister(int preg, OpArg newLoc)
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emit->MOVAPD(newLoc, regs[preg].location.GetSimpleReg());
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}
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void RegCache::Flush(bool clearState)
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void RegCache::Flush(FlushMode mode)
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{
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for (int i = 0; i < (int)xregs.size(); i++)
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{
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@ -329,7 +329,7 @@ void RegCache::Flush(bool clearState)
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{
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if (regs[i].location.IsSimpleReg() || regs[i].location.IsImm())
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{
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StoreFromRegister(i, clearState);
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StoreFromRegister(i, mode);
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}
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else
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{
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@ -10,6 +10,12 @@
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using namespace Gen;
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enum FlushMode
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{
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FLUSH_ALL,
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FLUSH_MAINTAIN_STATE,
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};
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struct PPCCachedReg
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{
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OpArg location;
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@ -63,7 +69,7 @@ public:
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FlushR(reg1); FlushR(reg2);
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LockX(reg1); LockX(reg2);
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}
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void Flush(bool clearState = true);
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void Flush(FlushMode mode = FLUSH_ALL);
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void Flush(PPCAnalyst::CodeOp *op) {Flush();}
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int SanityCheck() const;
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void KillImmediate(int preg, bool doLoad, bool makeDirty);
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@ -71,7 +77,7 @@ public:
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//TODO - instead of doload, use "read", "write"
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//read only will not set dirty flag
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void BindToRegister(int preg, bool doLoad = true, bool makeDirty = true);
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void StoreFromRegister(int preg, bool clearState = true);
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void StoreFromRegister(int preg, FlushMode mode = FLUSH_ALL);
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virtual void StoreRegister(int preg, OpArg newLoc) = 0;
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virtual void LoadRegister(int preg, X64Reg newLoc) = 0;
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@ -133,8 +133,8 @@ void Jit64::bcx(UGeckoInstruction inst)
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else
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destination = js.compilerPC + SignExt16(inst.BD << 2);
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gpr.Flush(false);
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fpr.Flush(false);
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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WriteExit(destination);
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if ((inst.BO & BO_DONT_CHECK_CONDITION) == 0)
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