From 5de8366db2ec084e95420b0853abb4d11a431ac0 Mon Sep 17 00:00:00 2001 From: skidau Date: Sun, 4 Mar 2012 08:10:46 +1100 Subject: [PATCH] Made the invalidation of the FIFO write JIT blocks more selective (efficient). Fixes the slowdown in the House of the Dead: Overkill cutscenes. --- Source/Core/Core/Src/HW/GPFifo.cpp | 7 +++---- Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp | 2 +- Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp | 2 +- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/Source/Core/Core/Src/HW/GPFifo.cpp b/Source/Core/Core/Src/HW/GPFifo.cpp index 35d678a411..725db3011c 100644 --- a/Source/Core/Core/Src/HW/GPFifo.cpp +++ b/Source/Core/Core/Src/HW/GPFifo.cpp @@ -98,13 +98,12 @@ void STACKALIGN CheckGatherPipe() memmove(m_gatherPipe, m_gatherPipe + cnt, m_gatherPipeCount); // Profile where the FIFO writes are occurring. - const u32 addr = PC - 4; - if (jit && (jit->js.fifoWriteAddresses.find(addr)) == (jit->js.fifoWriteAddresses.end())) + if (jit && (jit->js.fifoWriteAddresses.find(PC)) == (jit->js.fifoWriteAddresses.end())) { - jit->js.fifoWriteAddresses.insert(addr); + jit->js.fifoWriteAddresses.insert(PC); // Invalidate the JIT block so that it gets recompiled with the external exception check included. - jit->GetBlockCache()->InvalidateICache(addr, 8); + jit->GetBlockCache()->InvalidateICache(PC, 4); } } } diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp index 44ce9325b6..71718c6085 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp @@ -580,7 +580,7 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc FixupBranch noExtException = J_CC(CC_Z); TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP)); FixupBranch noCPInt = J_CC(CC_Z); - TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_DSP)); + TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_VI | ProcessorInterface::INT_CAUSE_PE_TOKEN | ProcessorInterface::INT_CAUSE_PE_FINISH)); FixupBranch clearInt = J_CC(CC_NZ); MOV(32, M(&PC), Imm32(ops[i].address)); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp index 0152d0d96e..cffc3b5feb 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp @@ -1929,7 +1929,7 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak FixupBranch noExtException = Jit->J_CC(CC_Z); Jit->TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP)); FixupBranch noCPInt = Jit->J_CC(CC_Z); - Jit->TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_DSP)); + Jit->TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_VI | ProcessorInterface::INT_CAUSE_PE_TOKEN | ProcessorInterface::INT_CAUSE_PE_FINISH)); FixupBranch clearInt = Jit->J_CC(CC_NZ); Jit->MOV(32, M(&PC), Imm32(InstLoc));