Removed the icache invalidation code as it is causing frequent code clearing.
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@ -418,17 +418,17 @@ bool JitBlock::ContainsAddress(u32 em_address)
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if (address & JIT_ICACHE_VMEM_BIT)
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{
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u32 cacheaddr = address & JIT_ICACHE_MASK;
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memset(iCacheVMEM + cacheaddr, JIT_ICACHE_INVALID_BYTE, 96);
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memset(iCacheVMEM + cacheaddr, JIT_ICACHE_INVALID_BYTE, 32);
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}
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else if (address & JIT_ICACHE_EXRAM_BIT)
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{
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u32 cacheaddr = address & JIT_ICACHEEX_MASK;
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memset(iCacheEx + cacheaddr, JIT_ICACHE_INVALID_BYTE, 96);
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memset(iCacheEx + cacheaddr, JIT_ICACHE_INVALID_BYTE, 32);
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}
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else
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{
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u32 cacheaddr = address & JIT_ICACHE_MASK;
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memset(iCache + cacheaddr, JIT_ICACHE_INVALID_BYTE, 96);
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memset(iCache + cacheaddr, JIT_ICACHE_INVALID_BYTE, 32);
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}
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#endif
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}
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@ -134,8 +134,6 @@ namespace PowerPC
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#endif
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if (t == 0xff) // load to the cache
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{
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if (jit)
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jit->GetBlockCache()->InvalidateICache(addr);
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if (HID0.ILOCK) // instruction cache is locked
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return Memory::ReadUnchecked_U32(addr);
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// select a way
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