Found out why I was getting unexpected IMM writes. I'm retarded, thank you very much
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3280 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -65,6 +65,7 @@ bool CEXIETHERNET::activate() {
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}
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#endif
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DEBUGPRINT("Returned Socket name is: %s\n", ifr.ifr_name);
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resume();
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return true;
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}
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@ -72,48 +73,74 @@ bool CEXIETHERNET::CheckRecieved()
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{
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if(!isActivated())
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return false;
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char RBuffer[2048]; // Bigger than MTU, but w/e
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int Size = recv(fd, RBuffer, 2048, MSG_PEEK);
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if(Size == -1)
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{
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DEBUGPRINT("Recieve check failed with %d\n", errno);
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return false;
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int i;
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int maxfd;
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int retval;
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struct timeval tv;
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int timeout = 3; // 3 seconds will kill him
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fd_set mask;
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/* Find the largest file descriptor */
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maxfd = fd;
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/* Check the file descriptors for available data */
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errno = 0;
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/* Set up the mask of file descriptors */
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FD_ZERO(&mask);
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FD_SET(fd, &mask);
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/* Set up the timeout */
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tv.tv_sec = timeout/1000;
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tv.tv_usec = (timeout%1000)*1000;
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/* Look! */
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retval = select(maxfd+1, &mask, NULL, NULL, &tv);
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/* Mark all file descriptors ready that have data available */
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if ( retval > 0 ) {
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if ( FD_ISSET(fd, &mask) )
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{
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DEBUGPRINT("\t\t\t\tWe have data!\n");
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return true;
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}
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}
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if(Size != 0)
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DEBUGPRINT("Have waiting Packet of size %d\n", Size);
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return false;
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}
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bool CEXIETHERNET::resume() {
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if(!isActivated())
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return true;
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DEBUGPRINT("BBA resume\n");
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if(mBbaMem[BBA_NCRA] & BBA_NCRA_SR) {
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startRecv();
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}
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DEBUGPRINT("BBA resume complete\n");
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return true;
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}
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bool CEXIETHERNET::startRecv() {
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DEBUGPRINT("Start Receive!\n");
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exit(0);
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/*if(!isActivated())
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//exit(0);
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if(!isActivated())
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return false;// Should actually be an assert
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if(!CheckRecieved()) // Check if we have data
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return false; // Nope
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DEBUGPRINT("startRecv... ");
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if(mWaiting) {
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DEBUGPRINT("already waiting\n");
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return true;
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}
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DWORD BytesRead = 0;
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DWORD *Buffer = (DWORD *)malloc(2048); // Should be enough
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DWORD res = ReadFile(mHAdapter, Buffer, BytesRead,
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&mRecvBufferLength, &mReadOverlapped);
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mRecvBuffer.write(BytesRead, Buffer);
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free(Buffer);
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if(res) { //Operation completed immediately
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DEBUGPRINT("completed, res %i\n", res);
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mWaiting = true;
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} else {
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res = GetLastError();
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if (res == ERROR_IO_PENDING) { //'s ok :)
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DEBUGPRINT("pending\n");
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//WaitCallback will be called
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mWaiting = true;
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} else { //error occurred
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return false;
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}
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u32 BytesRead = 0;
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u8 B[2];
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int Num = 0;
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while(read(fd, B, 1))
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{
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DEBUGPRINT("Read 1 Byte!\n");
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mRecvBuffer.write(1, B);
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Num++;
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}
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return true;*/
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DEBUGPRINT("Read %d bytes\n", Num);
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return true;
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}
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bool CEXIETHERNET::sendPacket(u8 *etherpckt, int size)
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{
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@ -45,18 +45,17 @@ void DEBUGPRINT (const char * format, ...)
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#define RISE(flags) ((SwappedData & (flags)) && !(mBbaMem[0x00] & (flags)))
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int mPacketsSent = 0;
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u8 mac_address[6] = {0x4D, 0xFF, 0x11, 0x88, 0xF1, 0x76};
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u8 mac_address[6] = {'D', 'O', 'L', 'P', 'H', 'I'}; // Looks Appropriate
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unsigned int Expecting;
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CEXIETHERNET::CEXIETHERNET() :
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m_uPosition(0),
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m_uCommand(0),
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mWriteBuffer(2048),
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#ifdef _WIN32
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mRecvBuffer(2048),
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#endif
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mCbw(mBbaMem + CB_OFFSET, CB_SIZE)
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mCbw(mBbaMem + CB_OFFSET, CB_SIZE),
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mRecvBuffer(2048)
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{
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memset(mBbaMem, 0, BBAMEM_SIZE);
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ID = 0x04020200;
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mWriteP = INVALID_P;
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mReadP = INVALID_P;
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@ -80,8 +79,8 @@ CEXIETHERNET::CEXIETHERNET() :
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void CEXIETHERNET::SetCS(int cs)
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{
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DEBUGPRINT("Set CS: %s\n", cs ? "true" : "false");
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if (!cs)
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DEBUGPRINT("Set CS: %s Expect Variable write?: %s\n", cs ? "true" : "false", mExpectVariableLengthImmWrite ? "true" : "false");
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if (cs)
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{
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if (mExpectVariableLengthImmWrite)
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{
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@ -135,9 +134,11 @@ bool CEXIETHERNET::checkRecvBuffer()
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}
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void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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{
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//DEBUGPRINT( "IMM Write, size 0x%x, data 0x%x mWriteP 0x%x\n", _uSize, _uData, mWriteP);
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DEBUGPRINT( "IMM Write, size 0x%x, data32: 0x%08x data16: 0x%04x data8: 0x%02x mWriteP 0x%x\n", _uSize, _uData, (u16)Common::swap32(_uData >> 8), (u8)Common::swap32(_uData), mWriteP);
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if (mExpectVariableLengthImmWrite)
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{
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DEBUGPRINT("\t[INFO]Variable length IMM write\n");
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// TODO: Use Swapped or unswapped?
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if(_uSize == 4)
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{
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@ -163,7 +164,7 @@ void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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{
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case BBA_IR:
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{
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//BBADEGUB("BBA Interrupt reset 0x%02X & ~(0x%02X) => 0x%02X\n", mBbaMem[0x09], MAKE(BYTE, data), mBbaMem[0x09] & ~MAKE(BYTE, data));
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DEBUGPRINT("\t\t[INFO]BBA Interrupt reset 0x%02X & ~(0x%02X) => 0x%02X\n", mBbaMem[0x09], MAKE(u8, _uData), mBbaMem[0x09] & ~MAKE(u8, _uData));
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//assert(_uSize == 1);
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// TODO: Should we swap our data?
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// With _uData not swapped, it becomes 0 when the data is 0xff000000
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@ -171,14 +172,13 @@ void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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//u32 SwappedData = Common::swap32(_uData);
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u32 SwappedData = _uData;
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mBbaMem[BBA_IR] &= ~MAKE(u8, SwappedData);
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DEBUGPRINT( "\t\t[INFO]mWriteP is %x. mBbaMem[0x09] is 0x%x\n", mWriteP, mBbaMem[0x09]);
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//exit(0);
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break;
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}
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case BBA_NCRA:
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{
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// Correct, we use the swap here
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u32 SwappedData = Common::swap32(_uData);
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u32 SwappedData = (u8)Common::swap32(_uData);
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//u32 SwappedData = _uData;
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// TODO: Should we swap our data?
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if (RISE(BBA_NCRA_RESET))
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@ -218,8 +218,9 @@ void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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activate();
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//say we've successfully negotiated for 10 Mbit full duplex
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//should placate libogc
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mBbaMem[BBA_NWAYS] = (BBA_NWAYS_LS10 | BBA_NWAYS_LPNWAY |BBA_NWAYS_ANCLPT | BBA_NWAYS_10TXF);
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mBbaMem[BBA_NWAYS] = (BBA_NWAYS_LS10 | BBA_NWAYS_LPNWAY | BBA_NWAYS_ANCLPT | BBA_NWAYS_10TXF);
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}
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break;
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case BBA_RRP: //RRP - Receive Buffer Read Page Pointer
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DEBUGPRINT( "\t\t[INFO]RRP\n");
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@ -236,7 +237,7 @@ void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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assert(Common::swap32(_uData) == (u32)((u16)mCbw.p_write() + CB_OFFSET) >> 8);
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break;
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case BBA_NWAYS:
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DEBUGPRINT(" Call to BBA_NWAYS directly!\n");
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DEBUGPRINT("[ERR]Call to BBA_NWAYS directly!\n");
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exit(0);
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break;
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case BBA_SI_ACTRL2:
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@ -259,16 +260,22 @@ void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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mExpectSpecialImmRead = true;
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return;
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}
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else if ((_uSize == 4 && (_uData & 0xC0000000) == 0xC0000000) || (_uSize == 2 && (_uData & 0x4000) == 0x4000))
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else if ((_uSize == 4 && (_uData & 0xC0000000) == 0xC0000000) || (_uSize == 2 && ((u16)Common::swap32(_uData >> 8) & 0x4000) == 0x4000))
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{
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// Write to BBA Register
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//DEBUGPRINT( "\t[INFO]Write to BBA register!\n");
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//u32 SwappedData = Common::swap32(_uData);
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u32 SwappedData = _uData;
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DEBUGPRINT( "\t[INFO]Write to BBA register!\n");
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// Dunno if this is correct TODO
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if (_uSize == 4)
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{
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u32 SwappedData = _uData;
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mWriteP = (u8)getbitsw(SwappedData, 16, 23);
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}
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else //size == 2
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{
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u16 SwappedData = (u16)Common::swap32(_uData >> 8);
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mWriteP = (u8)getbitsw(SwappedData & ~0x4000, 16, 23); //Whinecube : Dunno about this...
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}
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//Write of size 4 data 0xc0006000 causes write pointer to be set to 0x0000 when swapped.
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// When not swapped, the write pointer is set to 0x0060
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if (mWriteP == 0x48)
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@ -284,15 +291,14 @@ void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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}
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return;
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}
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else if ((_uSize == 4 && (_uData & 0xC0000000) == 0x80000000) || (_uSize == 2 && (_uData & 0x4000) == 0x0000))
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else if ((_uSize == 4 && (_uData & 0xC0000000) == 0x80000000) || (_uSize == 2 && ((u16)Common::swap32(_uData >> 8) & 0x4000) == 0x0000))
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{
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//DEBUGPRINT( "\t[INFO]Read from BBA register!\n");
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// Non-Swapped is the correct way
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u32 SwappedData = _uData;
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// Read from BBA Register!
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if(_uSize == 4)
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{
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mReadP = (u32)getbitsw(SwappedData, 8, 23);
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mReadP = (u16)getbitsw(SwappedData, 8, 23);
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if (mReadP >= BBAMEM_SIZE)
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{
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DEBUGPRINT( "\t\t[EEE]Illegal BBA address: 0x%04X\n", mReadP);
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@ -303,14 +309,13 @@ void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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}
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else
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{ //size == 2
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mReadP = (u16)getbitsw(SwappedData, 16, 23);
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mReadP = (u8)getbitsw(SwappedData, 16, 23);
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}
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// With the data not swapped,after a few reads, nReadP is always 0 in Mario Kart: DD; Size always 2
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// Before that, it does request the MAC address if it's unswapped
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DEBUGPRINT( "\t[INFO]Read from BBA register! 0x%X\n", mReadP);
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switch (mReadP)
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{
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case 0x20: //MAC address
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//DEBUGPRINT( "\t\t[INFO]Mac Address!\n");
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DEBUGPRINT( "\t\t[INFO]Mac Address!\n");
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memcpy(mBbaMem + mReadP, mac_address, 6);
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break;
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case 0x01: //Revision ID
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@ -354,7 +359,7 @@ void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
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u32 CEXIETHERNET::ImmRead(u32 _uSize)
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{
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//DEBUGPRINT( "IMM Read, size 0x%x\n", _uSize);
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DEBUGPRINT( "IMM Read, size 0x%x\n", _uSize);
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if (mExpectSpecialImmRead)
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{
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// 100% that this returns correctly
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@ -370,14 +375,6 @@ u32 CEXIETHERNET::ImmRead(u32 _uSize)
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exit(0);
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}
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u32 uResult = 0;
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switch(mReadP)
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{
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case BBA_NWAYS: // Bit of a hack
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mBbaMem[BBA_NWAYS] = (BBA_NWAYS_LS10 | BBA_NWAYS_LPNWAY | BBA_NWAYS_ANCLPT | BBA_NWAYS_10TXF);
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break;
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default:
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break;
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}
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memcpy(&uResult, mBbaMem + mReadP, _uSize);
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// TODO: We do as well?
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uResult = Common::swap32(uResult); //Whinecube : we have a byteswap problem...
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@ -113,9 +113,6 @@ private:
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u16 mRBRPP; //RRP - Receive Buffer Read Page Pointer
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bool mRBEmpty;
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#ifndef _WIN32
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u32 mRecvBufferLength;
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#endif
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#define BBAMEM_SIZE 0x1000
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u8 mBbaMem[BBAMEM_SIZE];
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@ -146,11 +143,12 @@ private:
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bool startRecv();
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volatile bool mWaiting;
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WriteBuffer mRecvBuffer;
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u32 mRecvBufferLength;
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#ifdef _WIN32
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HANDLE mHAdapter, mHRecvEvent, mHReadWait;
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DWORD mMtu;
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OVERLAPPED mReadOverlapped;
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WriteBuffer mRecvBuffer;
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DWORD mRecvBufferLength;
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static VOID CALLBACK ReadWaitCallback(PVOID lpParameter, BOOLEAN TimerFired);
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#endif
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