x64Emitter: short MOV for 64bit immediates (1)
Prior to this commit, the emitter would unconditionally emit a 10-byte instruction known as MOVABS when loading a 64-bit immediate to a register. 0: 48 b8 ef be ad de ff movabs rax,0xffffffffdeadbeef 7: ff ff ff With this change, it will instead emit a 7-byte instruction when it is possible to express the 64-bit immediate using a signed 32-bit value. 0: 48 c7 c0 ef be ad de mov rax,0xffffffffdeadbeef
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@ -1469,11 +1469,21 @@ void OpArg::WriteNormalOp(XEmitter* emit, bool toRM, NormalOp op, const OpArg& o
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// mov reg64, imm64
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// mov reg64, imm64
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else if (op == NormalOp::MOV)
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else if (op == NormalOp::MOV)
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{
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{
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emit->Write8(0xB8 + (offsetOrBaseReg & 7));
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// movabs reg64, imm64 (10 bytes)
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emit->Write64((u64)operand.offset);
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if (static_cast<s64>(operand.offset) != static_cast<s32>(operand.offset))
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return;
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{
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emit->Write8(0xB8 + (offsetOrBaseReg & 7));
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emit->Write64(operand.offset);
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return;
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}
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// mov reg64, simm32 (7 bytes)
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emit->Write8(op_def.imm32);
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immToWrite = 32;
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}
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else
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{
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ASSERT_MSG(DYNA_REC, 0, "WriteNormalOp - Only MOV can take 64-bit imm");
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}
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}
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ASSERT_MSG(DYNA_REC, 0, "WriteNormalOp - Only MOV can take 64-bit imm");
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}
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}
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else
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else
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{
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{
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