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Merge pull request #4103 from degasus/dynamic-bat 

JitArm64: Fix two issues.
This commit is contained in:
Markus Wick 2016-08-11 12:42:02 +02:00 committed by GitHub
parent 088f7eaa3d 447b23e09a
commit 5697032ec7
2 changed files with 21 additions and 5 deletions
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6
Source/Core/Core/PowerPC/JitArm64/JitArm64_Branch.cpp
View File

@ -59,12 +59,12 @@ void JitArm64::rfi(UGeckoInstruction inst)
LDR(INDEX_UNSIGNED, WC, PPC_REG, PPCSTATE_OFF(msr)); LDR(INDEX_UNSIGNED, WC, PPC_REG, PPCSTATE_OFF(msr));
AND(WC, WC, WB, ArithOption(WC, ST_LSL, 0)); // rD = Masked MSR AND(WC, WC, WA); // rD = Masked MSR
LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_SRR1])); // rB contains SRR1 here LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_SRR1])); // rB contains SRR1 here
AND(WA, WA, WB, ArithOption(WA, ST_LSL, 0)); // rB contains masked SRR1 here AND(WA, WA, WB); // rB contains masked SRR1 here
ORR(WA, WA, WC, ArithOption(WA, ST_LSL, 0)); // rB = Masked MSR OR masked SRR1 ORR(WA, WA, WC); // rB = Masked MSR OR masked SRR1
STR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(msr)); // STR rB in to rA STR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(msr)); // STR rB in to rA

20
Source/Core/Core/PowerPC/JitArm64/JitAsm.cpp
View File

@ -27,7 +27,6 @@ void JitArm64::GenerateAsm()
ABI_PushRegisters(regs_to_save); ABI_PushRegisters(regs_to_save);
MOVI2R(PPC_REG, (u64)&PowerPC::ppcState); MOVI2R(PPC_REG, (u64)&PowerPC::ppcState);
MOVI2R(MEM_REG, (u64)Memory::logical_base);
// Load the current PC into DISPATCHER_PC // Load the current PC into DISPATCHER_PC
LDR(INDEX_UNSIGNED, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc)); LDR(INDEX_UNSIGNED, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
@ -52,6 +51,15 @@ void JitArm64::GenerateAsm()
if (assembly_dispatcher) if (assembly_dispatcher)
{ {
// set the mem_base based on MSR flags
LDR(INDEX_UNSIGNED, ARM64Reg::W28, PPC_REG, PPCSTATE_OFF(msr));
FixupBranch physmem = TBNZ(ARM64Reg::W28, 31-27);
MOVI2R(MEM_REG, (u64)Memory::physical_base);
FixupBranch membaseend = B();
SetJumpTarget(physmem);
MOVI2R(MEM_REG, (u64)Memory::logical_base);
SetJumpTarget(membaseend);
// iCache[(address >> 2) & iCache_Mask]; // iCache[(address >> 2) & iCache_Mask];
ARM64Reg pc_masked = W25; ARM64Reg pc_masked = W25;
ARM64Reg cache_base = X27; ARM64Reg cache_base = X27;
@ -89,11 +97,19 @@ void JitArm64::GenerateAsm()
} }
// Call C version of Dispatch(). // Call C version of Dispatch().
// FIXME: Implement this in inline assembly.
STR(INDEX_UNSIGNED, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc)); STR(INDEX_UNSIGNED, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
MOVP2R(X30, reinterpret_cast<void*>(&JitBase::Dispatch)); MOVP2R(X30, reinterpret_cast<void*>(&JitBase::Dispatch));
BLR(X30); BLR(X30);
// set the mem_base based on MSR flags
LDR(INDEX_UNSIGNED, ARM64Reg::W28, PPC_REG, PPCSTATE_OFF(msr));
FixupBranch physmem = TBNZ(ARM64Reg::W28, 31-27);
MOVI2R(MEM_REG, (u64)Memory::physical_base);
FixupBranch membaseend = B();
SetJumpTarget(physmem);
MOVI2R(MEM_REG, (u64)Memory::logical_base);
SetJumpTarget(membaseend);
// Jump to next block. // Jump to next block.
BR(X0); BR(X0);