Merge pull request #4103 from degasus/dynamic-bat
JitArm64: Fix two issues.
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commit
5697032ec7
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@ -59,12 +59,12 @@ void JitArm64::rfi(UGeckoInstruction inst)
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LDR(INDEX_UNSIGNED, WC, PPC_REG, PPCSTATE_OFF(msr));
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AND(WC, WC, WB, ArithOption(WC, ST_LSL, 0)); // rD = Masked MSR
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AND(WC, WC, WA); // rD = Masked MSR
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LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(spr[SPR_SRR1])); // rB contains SRR1 here
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AND(WA, WA, WB, ArithOption(WA, ST_LSL, 0)); // rB contains masked SRR1 here
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ORR(WA, WA, WC, ArithOption(WA, ST_LSL, 0)); // rB = Masked MSR OR masked SRR1
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AND(WA, WA, WB); // rB contains masked SRR1 here
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ORR(WA, WA, WC); // rB = Masked MSR OR masked SRR1
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STR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(msr)); // STR rB in to rA
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@ -27,7 +27,6 @@ void JitArm64::GenerateAsm()
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ABI_PushRegisters(regs_to_save);
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MOVI2R(PPC_REG, (u64)&PowerPC::ppcState);
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MOVI2R(MEM_REG, (u64)Memory::logical_base);
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// Load the current PC into DISPATCHER_PC
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LDR(INDEX_UNSIGNED, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
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@ -52,6 +51,15 @@ void JitArm64::GenerateAsm()
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if (assembly_dispatcher)
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{
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// set the mem_base based on MSR flags
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LDR(INDEX_UNSIGNED, ARM64Reg::W28, PPC_REG, PPCSTATE_OFF(msr));
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FixupBranch physmem = TBNZ(ARM64Reg::W28, 31-27);
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MOVI2R(MEM_REG, (u64)Memory::physical_base);
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FixupBranch membaseend = B();
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SetJumpTarget(physmem);
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MOVI2R(MEM_REG, (u64)Memory::logical_base);
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SetJumpTarget(membaseend);
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// iCache[(address >> 2) & iCache_Mask];
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ARM64Reg pc_masked = W25;
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ARM64Reg cache_base = X27;
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@ -89,11 +97,19 @@ void JitArm64::GenerateAsm()
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}
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// Call C version of Dispatch().
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// FIXME: Implement this in inline assembly.
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STR(INDEX_UNSIGNED, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc));
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MOVP2R(X30, reinterpret_cast<void*>(&JitBase::Dispatch));
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BLR(X30);
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// set the mem_base based on MSR flags
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LDR(INDEX_UNSIGNED, ARM64Reg::W28, PPC_REG, PPCSTATE_OFF(msr));
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FixupBranch physmem = TBNZ(ARM64Reg::W28, 31-27);
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MOVI2R(MEM_REG, (u64)Memory::physical_base);
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FixupBranch membaseend = B();
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SetJumpTarget(physmem);
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MOVI2R(MEM_REG, (u64)Memory::logical_base);
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SetJumpTarget(membaseend);
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// Jump to next block.
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BR(X0);
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