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Fix for The Force Unleashed - SSSE3+ only. SSE2 solution is coming. 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2426 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
hrydgard 2009-02-24 21:54:04 +00:00
parent bf7d379537
commit 5644cfa884
4 changed files with 32 additions and 19 deletions
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38
Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStoreFloating.cpp
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@ -160,9 +160,6 @@ void Jit64::stfd(UGeckoInstruction inst)
if (Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITLoadStoreFloatingOff) if (Core::g_CoreStartupParameter.bJITOff || Core::g_CoreStartupParameter.bJITLoadStoreFloatingOff)
{Default(inst); return;} // turn off from debugger {Default(inst); return;} // turn off from debugger
Default(inst);
return;
INSTRUCTION_START; INSTRUCTION_START;
int s = inst.RS; int s = inst.RS;
@ -176,7 +173,29 @@ void Jit64::stfd(UGeckoInstruction inst)
gpr.FlushLockX(ABI_PARAM1); gpr.FlushLockX(ABI_PARAM1);
gpr.Lock(a); gpr.Lock(a);
fpr.Lock(s); fpr.Lock(s);
MOV(32, R(ABI_PARAM1), gpr.R(a)); gpr.LoadToX64(a, true, false);
LEA(32, ABI_PARAM1, MDisp(gpr.R(a).GetSimpleReg(), offset));
TEST(32, R(ABI_PARAM1), Imm32(0x0c000000));
FixupBranch not_ram = J_CC(CC_Z);
if (cpu_info.bSSSE3) {
MOVAPD(XMM0, fpr.R(s));
PSHUFB(XMM0, M((void *)bswapShuffle1x8));
CALL(asm_routines.fifoDirectWriteXmm64);
} else {
// This ain't working yet
/* fpr.LoadToX64(s, true, false);
MOVSD(M(&temp64), fpr.RX(s));
MOV(32, R(EAX), M(&temp64));
MOV(32, R(ABI_PARAM1), M((void*)((u32)&temp64 + 4)));
BSWAP(32, EAX);
BSWAP(32, ABI_PARAM1);
MOV(32, M(((u8 *)&temp64) + 4), R(EAX));
MOV(32, M((u8 *)&temp64), R(ABI_PARAM1));
MOVSD(XMM0, M(&temp64));
CALL(asm_routines.fifoDirectWriteXmm64); */
}
FixupBranch quit = J(false);
SetJumpTarget(not_ram);
#ifdef _M_IX86 #ifdef _M_IX86
AND(32, R(ABI_PARAM1), Imm32(Memory::MEMVIEW32_MASK)); AND(32, R(ABI_PARAM1), Imm32(Memory::MEMVIEW32_MASK));
#endif #endif
@ -184,9 +203,9 @@ void Jit64::stfd(UGeckoInstruction inst)
MOVAPD(XMM0, fpr.R(s)); MOVAPD(XMM0, fpr.R(s));
PSHUFB(XMM0, M((void *)bswapShuffle1x8)); PSHUFB(XMM0, M((void *)bswapShuffle1x8));
#ifdef _M_X64 #ifdef _M_X64
MOVQ_xmm(MComplex(RBX, ABI_PARAM1, SCALE_1, offset), XMM0); MOVQ_xmm(MComplex(RBX, ABI_PARAM1, SCALE_1, 0), XMM0);
#else #else
MOVQ_xmm(MDisp(ABI_PARAM1, (u32)Memory::base + offset), XMM0); MOVQ_xmm(MDisp(ABI_PARAM1, (u32)Memory::base), XMM0);
#endif #endif
} else { } else {
#ifdef _M_X64 #ifdef _M_X64
@ -194,18 +213,19 @@ void Jit64::stfd(UGeckoInstruction inst)
MOVSD(M(&temp64), fpr.RX(s)); MOVSD(M(&temp64), fpr.RX(s));
MOV(64, R(EAX), M(&temp64)); MOV(64, R(EAX), M(&temp64));
BSWAP(64, EAX); BSWAP(64, EAX);
MOV(64, MComplex(RBX, ABI_PARAM1, SCALE_1, offset), R(EAX)); MOV(64, MComplex(RBX, ABI_PARAM1, SCALE_1, 0), R(EAX));
#else #else
fpr.LoadToX64(s, true, false); fpr.LoadToX64(s, true, false);
MOVSD(M(&temp64), fpr.RX(s)); MOVSD(M(&temp64), fpr.RX(s));
MOV(32, R(EAX), M(&temp64)); MOV(32, R(EAX), M(&temp64));
BSWAP(32, EAX); BSWAP(32, EAX);
MOV(32, MDisp(ABI_PARAM1, (u32)Memory::base + offset + 4), R(EAX)); MOV(32, MDisp(ABI_PARAM1, (u32)Memory::base + 4), R(EAX));
MOV(32, R(EAX), M((void*)((u32)&temp64 + 4))); MOV(32, R(EAX), M((void*)((u32)&temp64 + 4)));
BSWAP(32, EAX); BSWAP(32, EAX);
MOV(32, MDisp(ABI_PARAM1, (u32)Memory::base + offset), R(EAX)); MOV(32, MDisp(ABI_PARAM1, (u32)Memory::base), R(EAX));
#endif #endif
} }
SetJumpTarget(quit);
gpr.UnlockAll(); gpr.UnlockAll();
gpr.UnlockAllX(); gpr.UnlockAllX();
fpr.UnlockAll(); fpr.UnlockAll();

9
Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStorePaired.cpp
View File

@ -283,14 +283,7 @@ void Jit64::psq_st(UGeckoInstruction inst)
PACKSSDW(XMM0, R(XMM0)); PACKSSDW(XMM0, R(XMM0));
MOVD_xmm(M(&temp64), XMM0); MOVD_xmm(M(&temp64), XMM0);
MOV(32, R(ABI_PARAM1), M(&temp64)); MOV(32, R(ABI_PARAM1), M(&temp64));
BSWAP(32, ABI_PARAM1); SafeWriteRegToReg(ABI_PARAM1, ABI_PARAM2, 32, 0);
#ifdef _M_X64
MOV(32, MComplex(RBX, ABI_PARAM2, SCALE_1, 0), R(ABI_PARAM1));
#else
MOV(32, R(EAX), R(ABI_PARAM2));
AND(32, R(EAX), Imm32(Memory::MEMVIEW32_MASK));
MOV(32, MDisp(EAX, (u32)Memory::base), R(ABI_PARAM1));
#endif
gpr.UnlockAll(); gpr.UnlockAll();
gpr.UnlockAllX(); gpr.UnlockAllX();
fpr.UnlockAll(); fpr.UnlockAll();

2
Source/Core/Core/Src/PowerPC/Jit64IL/JitAsm.h
View File

@ -41,7 +41,7 @@ private:
void GenerateCommon(); void GenerateCommon();
void GenFifoWrite(int size); void GenFifoWrite(int size);
void GenFifoFloatWrite(); void GenFifoFloatWrite();
void GenFifoXmm64Write(); void GenFifoXmm64Write(); // yes, 32 & 64-bit compatible
void GenQuantizedLoads(); void GenQuantizedLoads();
void GenQuantizedStores(); void GenQuantizedStores();

2
Source/Core/Core/Src/PowerPC/PPCTables.cpp
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@ -45,7 +45,7 @@ struct op_inf
int count; int count;
bool operator < (const op_inf &o) const bool operator < (const op_inf &o) const
{ {
return count > o.count; return count > o.count;
} }
}; };