Merge pull request #12432 from JosJuice/jitarm64-logic-i2r-opt
JitArm64: Add additional optimized cases to ANDI2R and friends
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commit
559ea0593c
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@ -4039,9 +4039,27 @@ void ARM64FloatEmitter::ABI_PopRegisters(BitSet32 registers, ARM64Reg tmp)
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void ARM64XEmitter::ANDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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void ARM64XEmitter::ANDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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{
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{
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if (!Is64Bit(Rn))
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if (!Is64Bit(Rn))
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imm &= 0xFFFFFFFF;
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{
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// To handle 32-bit logical immediates, the very easiest thing is to repeat
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// the input value twice to make a 64-bit word. The correct encoding of that
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// as a logical immediate will also be the correct encoding of the 32-bit
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// value.
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//
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// Doing this here instead of in the LogicalImm constructor makes it easier
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// to check if the input is all ones.
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if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
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imm = (imm << 32) | (imm & 0xFFFFFFFF);
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}
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if ((~imm) == 0)
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{
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// Do nothing
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}
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else if (imm == 0)
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{
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MOVZ(Rd, 0);
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}
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else if (const auto result = LogicalImm(imm, GPRSize::B64))
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{
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{
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AND(Rd, Rn, result);
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AND(Rd, Rn, result);
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}
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}
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@ -4057,7 +4075,28 @@ void ARM64XEmitter::ANDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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void ARM64XEmitter::ORRI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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void ARM64XEmitter::ORRI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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{
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{
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if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
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if (!Is64Bit(Rn))
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{
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// To handle 32-bit logical immediates, the very easiest thing is to repeat
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// the input value twice to make a 64-bit word. The correct encoding of that
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// as a logical immediate will also be the correct encoding of the 32-bit
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// value.
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//
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// Doing this here instead of in the LogicalImm constructor makes it easier
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// to check if the input is all ones.
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imm = (imm << 32) | (imm & 0xFFFFFFFF);
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}
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if (imm == 0)
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{
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// Do nothing
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}
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else if ((~imm) == 0)
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{
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MOVN(Rd, 0);
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}
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else if (const auto result = LogicalImm(imm, GPRSize::B64))
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{
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{
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ORR(Rd, Rn, result);
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ORR(Rd, Rn, result);
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}
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}
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@ -4073,7 +4112,28 @@ void ARM64XEmitter::ORRI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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void ARM64XEmitter::EORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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void ARM64XEmitter::EORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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{
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{
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if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
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if (!Is64Bit(Rn))
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{
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// To handle 32-bit logical immediates, the very easiest thing is to repeat
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// the input value twice to make a 64-bit word. The correct encoding of that
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// as a logical immediate will also be the correct encoding of the 32-bit
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// value.
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//
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// Doing this here instead of in the LogicalImm constructor makes it easier
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// to check if the input is all ones.
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imm = (imm << 32) | (imm & 0xFFFFFFFF);
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}
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if (imm == 0)
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{
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// Do nothing
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}
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else if ((~imm) == 0)
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{
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MVN(Rd, Rn);
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}
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else if (const auto result = LogicalImm(imm, GPRSize::B64))
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{
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{
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EOR(Rd, Rn, result);
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EOR(Rd, Rn, result);
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}
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}
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@ -4089,7 +4149,29 @@ void ARM64XEmitter::EORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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void ARM64XEmitter::ANDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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void ARM64XEmitter::ANDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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{
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{
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if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
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if (!Is64Bit(Rn))
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{
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// To handle 32-bit logical immediates, the very easiest thing is to repeat
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// the input value twice to make a 64-bit word. The correct encoding of that
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// as a logical immediate will also be the correct encoding of the 32-bit
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// value.
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//
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// Doing this here instead of in the LogicalImm constructor makes it easier
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// to check if the input is all ones.
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imm = (imm << 32) | (imm & 0xFFFFFFFF);
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}
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if (imm == 0)
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{
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ANDS(Rd, Is64Bit(Rn) ? ARM64Reg::ZR : ARM64Reg::WZR,
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Is64Bit(Rn) ? ARM64Reg::ZR : ARM64Reg::WZR);
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}
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else if ((~imm) == 0)
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{
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ANDS(Rd, Rn, Rn);
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}
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else if (const auto result = LogicalImm(imm, GPRSize::B64))
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{
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{
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ANDS(Rd, Rn, result);
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ANDS(Rd, Rn, result);
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}
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}
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