From 55062951236723d8d72504cb487df7101d55f9bd Mon Sep 17 00:00:00 2001 From: degasus Date: Thu, 11 Feb 2016 11:14:12 +0100 Subject: [PATCH] JitArm64: Track singles in frspx. --- .../JitArm64/JitArm64_FloatingPoint.cpp | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp index 3d11e37814..40212a35bc 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp @@ -169,11 +169,22 @@ void JitArm64::frspx(UGeckoInstruction inst) u32 b = inst.FB, d = inst.FD; - ARM64Reg VB = fpr.R(b, REG_IS_LOADED); - ARM64Reg VD = fpr.RW(d, REG_DUP); + if (fpr.IsSingle(b)) + { + // Source is already in single precision, so no need to do anything but to copy to PSR1. + ARM64Reg VB = fpr.R(b, REG_IS_LOADED_SINGLE); + ARM64Reg VD = fpr.RW(d, REG_DUP_SINGLE); - m_float_emit.FCVT(32, 64, EncodeRegToDouble(VD), EncodeRegToDouble(VB)); - m_float_emit.FCVT(64, 32, EncodeRegToDouble(VD), EncodeRegToDouble(VD)); + if (b != d) + m_float_emit.FMOV(EncodeRegToSingle(VD), EncodeRegToSingle(VB)); + } + else + { + ARM64Reg VB = fpr.R(b, REG_IS_LOADED); + ARM64Reg VD = fpr.RW(d, REG_DUP_SINGLE); + + m_float_emit.FCVT(32, 64, EncodeRegToDouble(VD), EncodeRegToDouble(VB)); + } } void JitArm64::fcmpX(UGeckoInstruction inst)