JitArm64: Use ConvertSingleToDoubleLower in RW when faster
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@ -163,6 +163,8 @@ public:
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Arm64Gen::ARM64Reg src_reg,
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Arm64Gen::ARM64Reg scratch_reg = Arm64Gen::ARM64Reg::INVALID_REG);
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bool IsFPRStoreSafe(size_t guest_reg) const;
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protected:
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struct SlowmemHandler
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{
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@ -572,3 +572,8 @@ void JitArm64::ConvertSingleToDoublePair(size_t guest_reg, ARM64Reg dest_reg, AR
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SetJumpTarget(continue1);
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}
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}
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bool JitArm64::IsFPRStoreSafe(size_t guest_reg) const
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{
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return js.fpr_is_store_safe[guest_reg];
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}
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@ -602,9 +602,27 @@ ARM64Reg Arm64FPRCache::RW(size_t preg, RegType type)
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switch (reg.GetType())
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{
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case RegType::Single:
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// For a store-safe register, conversion is just one instruction regardless of whether
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// we're whether we're converting a pair, so ConvertSingleToDoublePair followed by a
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// 128-bit store is faster than INS followed by ConvertSingleToDoubleLower and a
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// 64-bit store. But for registers which are not store-safe, the latter is better.
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flush_reg = GetReg();
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m_jit->ConvertSingleToDoublePair(preg, flush_reg, host_reg, flush_reg);
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[[fallthrough]];
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if (!m_jit->IsFPRStoreSafe(preg))
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{
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ARM64Reg scratch_reg = GetReg();
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m_float_emit->INS(32, flush_reg, 0, host_reg, 1);
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m_jit->ConvertSingleToDoubleLower(preg, flush_reg, flush_reg, scratch_reg);
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m_float_emit->STR(64, IndexType::Unsigned, flush_reg, PPC_REG, u32(PPCSTATE_OFF_PS1(preg)));
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Unlock(scratch_reg);
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break;
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}
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else
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{
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m_jit->ConvertSingleToDoublePair(preg, flush_reg, host_reg, flush_reg);
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m_float_emit->STR(128, IndexType::Unsigned, flush_reg, PPC_REG,
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u32(PPCSTATE_OFF_PS0(preg)));
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}
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break;
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case RegType::Register:
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// We are doing a full 128bit store because it takes 2 cycles on a Cortex-A57 to do a 128bit
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// store.
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