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Merge pull request #4666 from lioncash/jitil-ir 

IR_X86: Minor changes to RegInfo
This commit is contained in:
Matthew Parlane 2017-01-17 11:52:44 +13:00 committed by GitHub
parent 8153772bfe 43910e474b
commit 53bfab057c
1 changed files with 16 additions and 20 deletions
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36
Source/Core/Core/PowerPC/Jit64IL/IR_X86.cpp
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@ -26,6 +26,8 @@ The register allocation is linear scan allocation.
#endif #endif
#include <algorithm> #include <algorithm>
#include <array>
#include <cstddef>
#include <vector> #include <vector>
#include "Common/BitSet.h" #include "Common/BitSet.h"
@ -33,6 +35,7 @@ The register allocation is linear scan allocation.
#include "Common/CommonTypes.h" #include "Common/CommonTypes.h"
#include "Common/MathUtil.h" #include "Common/MathUtil.h"
#include "Common/MsgHandler.h" #include "Common/MsgHandler.h"
#include "Common/NonCopyable.h"
#include "Common/x64ABI.h" #include "Common/x64ABI.h"
#include "Common/x64Emitter.h" #include "Common/x64Emitter.h"
#include "Core/CoreTiming.h" #include "Core/CoreTiming.h"
@ -46,12 +49,12 @@ The register allocation is linear scan allocation.
using namespace IREmitter; using namespace IREmitter;
using namespace Gen; using namespace Gen;
static const unsigned int MAX_NUMBER_OF_REGS = 16; struct RegInfo final : private NonCopyable
struct RegInfo
{ {
static constexpr size_t MAX_NUMBER_OF_REGS = 16;
JitIL* Jit; JitIL* Jit;
IRBuilder* Build; IRBuilder* Build = nullptr;
InstLoc FirstI; InstLoc FirstI;
// IInfo contains (per instruction) // IInfo contains (per instruction)
@ -63,31 +66,24 @@ struct RegInfo
// and if we can clobber the operands registers. // and if we can clobber the operands registers.
// Warning, Memory instruction use these bits slightly differently. // Warning, Memory instruction use these bits slightly differently.
// Bits 15-31: Spill location // Bits 15-31: Spill location
std::vector<unsigned> IInfo; std::vector<u32> IInfo;
// The last instruction which uses the result of this instruction. Used by the register allocator. // The last instruction which uses the result of this instruction. Used by the register allocator.
std::vector<InstLoc> lastUsed; std::vector<InstLoc> lastUsed;
InstLoc regs[MAX_NUMBER_OF_REGS]; std::array<InstLoc, MAX_NUMBER_OF_REGS> regs{};
InstLoc fregs[MAX_NUMBER_OF_REGS]; std::array<InstLoc, MAX_NUMBER_OF_REGS> fregs{};
unsigned numSpills; u32 numSpills = 0;
unsigned numFSpills; u32 numFSpills = 0;
unsigned exitNumber; u32 exitNumber = 0;
RegInfo(JitIL* j, InstLoc f, unsigned insts) RegInfo(JitIL* j, InstLoc f, u32 insts) : Jit(j), FirstI(f), IInfo(insts), lastUsed(insts) {}
: Jit(j), Build(nullptr), FirstI(f), IInfo(insts), lastUsed(insts), regs(), fregs(),
numSpills(0), numFSpills(0), exitNumber(0)
{
}
private:
RegInfo(RegInfo&); // DO NOT IMPLEMENT
}; };
static BitSet32 regsInUse(RegInfo& R) static BitSet32 regsInUse(RegInfo& R)
{ {
BitSet32 result; BitSet32 result;
for (unsigned i = 0; i < MAX_NUMBER_OF_REGS; i++) for (size_t i = 0; i < RegInfo::MAX_NUMBER_OF_REGS; i++)
{ {
if (R.regs[i] != nullptr) if (R.regs[i] != nullptr)
result[i] = true; result[i] = true;
@ -2330,7 +2326,7 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, u32 exitAddress)
} }
} }
for (unsigned i = 0; i < MAX_NUMBER_OF_REGS; i++) for (size_t i = 0; i < RegInfo::MAX_NUMBER_OF_REGS; i++)
{ {
if (RI.regs[i]) if (RI.regs[i])
{ {