[ARM] fmaddsx and fmaddx implementations.
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@ -197,6 +197,9 @@ public:
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void fmulsx(UGeckoInstruction _inst);
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void fmulx(UGeckoInstruction _inst);
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void fmrx(UGeckoInstruction _inst);
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void fmaddsx(UGeckoInstruction _inst);
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void fmaddx(UGeckoInstruction _inst);
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// Floating point loadStore
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void lfs(UGeckoInstruction _inst);
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@ -173,3 +173,54 @@ void JitArm::fmrx(UGeckoInstruction inst)
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if (inst.Rc) Helper_UpdateCR1(vD);
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}
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void JitArm::fmaddsx(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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JITDISABLE(bJITFloatingPointOff)
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u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
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ARMReg vA0 = fpr.R0(a);
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ARMReg vB0 = fpr.R0(b);
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ARMReg vC0 = fpr.R0(c);
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ARMReg vD0 = fpr.R0(d, false);
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ARMReg vD1 = fpr.R1(d, false);
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ARMReg V0 = fpr.GetReg();
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VMOV(V0, vB0);
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VMLA(V0, vA0, vC0);
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VMOV(vD0, V0);
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VMOV(vD1, V0);
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fpr.Unlock(V0);
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if (inst.Rc) Helper_UpdateCR1(vD0);
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}
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void JitArm::fmaddx(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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JITDISABLE(bJITFloatingPointOff)
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u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD;
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ARMReg vA0 = fpr.R0(a);
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ARMReg vB0 = fpr.R0(b);
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ARMReg vC0 = fpr.R0(c);
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ARMReg vD0 = fpr.R0(d, false);
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ARMReg V0 = fpr.GetReg();
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VMOV(V0, vB0);
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VMLA(V0, vA0, vC0);
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VMOV(vD0, V0);
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fpr.Unlock(V0);
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if (inst.Rc) Helper_UpdateCR1(vD0);
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}
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@ -339,7 +339,7 @@ static GekkoOPTemplate table59[] =
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{24, &JitArm::Default}, //"fresx", OPTYPE_FPU, FL_RC_BIT_F}},
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{25, &JitArm::fmulsx}, //"fmulsx", OPTYPE_FPU, FL_RC_BIT_F}},
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{28, &JitArm::Default}, //"fmsubsx", OPTYPE_FPU, FL_RC_BIT_F}},
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{29, &JitArm::Default}, //"fmaddsx", OPTYPE_FPU, FL_RC_BIT_F}},
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{29, &JitArm::fmaddsx}, //"fmaddsx", OPTYPE_FPU, FL_RC_BIT_F}},
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{30, &JitArm::Default}, //"fnmsubsx", OPTYPE_FPU, FL_RC_BIT_F}},
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{31, &JitArm::Default}, //"fnmaddsx", OPTYPE_FPU, FL_RC_BIT_F}},
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};
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@ -374,7 +374,7 @@ static GekkoOPTemplate table63_2[] =
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{25, &JitArm::fmulx}, //"fmulx", OPTYPE_FPU, FL_RC_BIT_F}},
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{26, &JitArm::Default}, //"frsqrtex", OPTYPE_FPU, FL_RC_BIT_F}},
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{28, &JitArm::Default}, //"fmsubx", OPTYPE_FPU, FL_RC_BIT_F}},
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{29, &JitArm::Default}, //"fmaddx", OPTYPE_FPU, FL_RC_BIT_F}},
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{29, &JitArm::fmaddx}, //"fmaddx", OPTYPE_FPU, FL_RC_BIT_F}},
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{30, &JitArm::Default}, //"fnmsubx", OPTYPE_FPU, FL_RC_BIT_F}},
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{31, &JitArm::Default}, //"fnmaddx", OPTYPE_FPU, FL_RC_BIT_F}},
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};
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