From 52b45a39332679dacc5454c4a66ee515d5d9305f Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 4 Feb 2017 18:58:43 -0500 Subject: [PATCH] PowerPC: Rename tlb_entry struct to TLBEntry Makes it consistent with our naming style. --- Source/Core/Core/PowerPC/MMU.cpp | 11 +++++------ Source/Core/Core/PowerPC/PowerPC.h | 4 ++-- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp index 9679460357..fc5316b36f 100644 --- a/Source/Core/Core/PowerPC/MMU.cpp +++ b/Source/Core/Core/PowerPC/MMU.cpp @@ -972,7 +972,7 @@ enum TLBLookupResult static TLBLookupResult LookupTLBPageAddress(const XCheckTLBFlag flag, const u32 vpa, u32* paddr) { u32 tag = vpa >> HW_PAGE_INDEX_SHIFT; - PowerPC::tlb_entry* tlbe = &PowerPC::ppcState.tlb[IsOpcodeFlag(flag)][tag & HW_PAGE_INDEX_MASK]; + TLBEntry* tlbe = &ppcState.tlb[IsOpcodeFlag(flag)][tag & HW_PAGE_INDEX_MASK]; if (tlbe->tag[0] == tag) { // Check if C bit requires updating @@ -1026,7 +1026,7 @@ static void UpdateTLBEntry(const XCheckTLBFlag flag, UPTE2 PTE2, const u32 addre return; int tag = address >> HW_PAGE_INDEX_SHIFT; - PowerPC::tlb_entry* tlbe = &PowerPC::ppcState.tlb[IsOpcodeFlag(flag)][tag & HW_PAGE_INDEX_MASK]; + TLBEntry* tlbe = &ppcState.tlb[IsOpcodeFlag(flag)][tag & HW_PAGE_INDEX_MASK]; int index = tlbe->recent == 0 && tlbe->tag[0] != TLB_TAG_INVALID; tlbe->recent = index; tlbe->paddr[index] = PTE2.RPN << HW_PAGE_INDEX_SHIFT; @@ -1036,12 +1036,11 @@ static void UpdateTLBEntry(const XCheckTLBFlag flag, UPTE2 PTE2, const u32 addre void InvalidateTLBEntry(u32 address) { - PowerPC::tlb_entry* tlbe = - &PowerPC::ppcState.tlb[0][(address >> HW_PAGE_INDEX_SHIFT) & HW_PAGE_INDEX_MASK]; + TLBEntry* tlbe = &ppcState.tlb[0][(address >> HW_PAGE_INDEX_SHIFT) & HW_PAGE_INDEX_MASK]; tlbe->tag[0] = TLB_TAG_INVALID; tlbe->tag[1] = TLB_TAG_INVALID; - PowerPC::tlb_entry* tlbe_i = - &PowerPC::ppcState.tlb[1][(address >> HW_PAGE_INDEX_SHIFT) & HW_PAGE_INDEX_MASK]; + + TLBEntry* tlbe_i = &ppcState.tlb[1][(address >> HW_PAGE_INDEX_SHIFT) & HW_PAGE_INDEX_MASK]; tlbe_i->tag[0] = TLB_TAG_INVALID; tlbe_i->tag[1] = TLB_TAG_INVALID; } diff --git a/Source/Core/Core/PowerPC/PowerPC.h b/Source/Core/Core/PowerPC/PowerPC.h index 760bf45577..378c67cdb8 100644 --- a/Source/Core/Core/PowerPC/PowerPC.h +++ b/Source/Core/Core/PowerPC/PowerPC.h @@ -42,7 +42,7 @@ enum CoreMode #define TLB_WAYS 2 #define TLB_TAG_INVALID 0xffffffff -struct tlb_entry +struct TLBEntry { u32 tag[TLB_WAYS] = {TLB_TAG_INVALID, TLB_TAG_INVALID}; u32 paddr[TLB_WAYS] = {}; @@ -114,7 +114,7 @@ struct PowerPCState // Storage for the stack pointer of the BLR optimization. u8* stored_stack_pointer; - std::array, NUM_TLBS> tlb; + std::array, NUM_TLBS> tlb; u32 pagetable_base; u32 pagetable_hashmask;