Switched the DSP DMA transfers to unaligned versions of the SSSE3 instructions
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6823 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -281,7 +281,7 @@ void gdsp_ddma_in(u16 dsp_addr, u32 addr, u32 size)
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{
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{
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for (u32 i = 0; i < size; i += 16)
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for (u32 i = 0; i < size; i += 16)
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{
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{
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_mm_store_si128((__m128i *)&dst[dsp_addr + i], _mm_shuffle_epi8(_mm_load_si128((__m128i *)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF]), s_mask));
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_mm_storeu_si128((__m128i *)&dst[dsp_addr + i], _mm_shuffle_epi8(_mm_loadu_si128((__m128i *)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF]), s_mask));
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}
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}
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}
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}
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else
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else
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@ -305,7 +305,7 @@ void gdsp_ddma_out(u16 dsp_addr, u32 addr, u32 size)
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{
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{
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for (u32 i = 0; i < size; i += 16)
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for (u32 i = 0; i < size; i += 16)
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{
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{
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_mm_store_si128((__m128i *)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF], _mm_shuffle_epi8(_mm_load_si128((__m128i *)&src[dsp_addr + i]), s_mask));
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_mm_storeu_si128((__m128i *)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF], _mm_shuffle_epi8(_mm_loadu_si128((__m128i *)&src[dsp_addr + i]), s_mask));
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}
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}
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}
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}
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else
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else
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