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DSP jit: a so people can review commit 

(that for ector, bhaal, skidau)


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5330 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee 2010-04-11 16:36:00 +00:00
parent 945f8089b8
commit 524a6dd2bb
3 changed files with 83 additions and 34 deletions
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2
Source/Core/DSPCore/Src/DSPEmitter.h
View File

@ -54,7 +54,7 @@ public:
void increase_addr_reg(int reg);
void decrease_addr_reg(int reg);
void ext_dmem_write(u32 src, u32 dest);
u16 ext_dmem_read(u16 addr);
void ext_dmem_read(u16 addr);
void writeAxAcc(const UDSPInstruction opc);
// Ext commands

71
Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
View File

@ -16,8 +16,12 @@
// http://code.google.com/p/dolphin-emu/
#include "../DSPMemoryMap.h"
#include "../DSPEmitter.h"
#include "x64Emitter.h"
#include "ABI.h"
#include "../DSPIntExtOps.h" // remove when getting rid of writebacklog
// See docs in the interpeter
using namespace Gen;
inline bool IsSameMemArea(u16 a, u16 b)
{
@ -104,7 +108,10 @@ void DSPEmitter::l(const UDSPInstruction opc)
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
{
u16 val = ext_dmem_read(g_dsp.r[sreg]);
u16 val;
ext_dmem_read(g_dsp.r[sreg]);
MOV(16, M(&val), R(EAX));
writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
writeToBackLog(1, dreg, val);
writeToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0);
@ -112,7 +119,8 @@ void DSPEmitter::l(const UDSPInstruction opc)
}
else
{
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[sreg]));
ext_dmem_read(g_dsp.r[sreg]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
increment_addr_reg(sreg);
}
}
@ -128,7 +136,9 @@ void DSPEmitter::ln(const UDSPInstruction opc)
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
{
u16 val = ext_dmem_read(g_dsp.r[sreg]);
u16 val;
ext_dmem_read(g_dsp.r[sreg]);
MOV(16, M(&val), R(EAX));
writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
writeToBackLog(1, dreg, val);
writeToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0);
@ -136,7 +146,8 @@ void DSPEmitter::ln(const UDSPInstruction opc)
}
else
{
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[sreg]));
ext_dmem_read(g_dsp.r[sreg]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
increase_addr_reg(sreg);
}
}
@ -152,8 +163,10 @@ void DSPEmitter::ls(const UDSPInstruction opc)
u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
ext_dmem_write(DSP_REG_AR3, sreg);
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR0]));
ext_dmem_read(g_dsp.r[DSP_REG_AR0]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
increment_addr_reg(DSP_REG_AR3);
increment_addr_reg(DSP_REG_AR0);
}
@ -172,7 +185,9 @@ void DSPEmitter::lsn(const UDSPInstruction opc)
ext_dmem_write(DSP_REG_AR3, sreg);
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR0]));
ext_dmem_read(g_dsp.r[DSP_REG_AR0]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
increment_addr_reg(DSP_REG_AR3);
increase_addr_reg(DSP_REG_AR0);
}
@ -190,7 +205,9 @@ void DSPEmitter::lsm(const UDSPInstruction opc)
ext_dmem_write(DSP_REG_AR3, sreg);
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR0]));
ext_dmem_read(g_dsp.r[DSP_REG_AR0]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
increase_addr_reg(DSP_REG_AR3);
increment_addr_reg(DSP_REG_AR0);
}
@ -209,7 +226,9 @@ void DSPEmitter::lsnm(const UDSPInstruction opc)
ext_dmem_write(DSP_REG_AR3, sreg);
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR0]));
ext_dmem_read(g_dsp.r[DSP_REG_AR0]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
increase_addr_reg(DSP_REG_AR3);
increase_addr_reg(DSP_REG_AR0);
}
@ -225,8 +244,10 @@ void DSPEmitter::sl(const UDSPInstruction opc)
u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
ext_dmem_write(DSP_REG_AR0, sreg);
ext_dmem_read(g_dsp.r[DSP_REG_AR3]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
increment_addr_reg(DSP_REG_AR3);
increment_addr_reg(DSP_REG_AR0);
}
@ -243,8 +264,10 @@ void DSPEmitter::sln(const UDSPInstruction opc)
u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
ext_dmem_write(DSP_REG_AR0, sreg);
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
ext_dmem_read(g_dsp.r[DSP_REG_AR3]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
increment_addr_reg(DSP_REG_AR3);
increase_addr_reg(DSP_REG_AR0);
}
@ -261,8 +284,10 @@ void DSPEmitter::slm(const UDSPInstruction opc)
u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
ext_dmem_write(DSP_REG_AR0, sreg);
ext_dmem_read(g_dsp.r[DSP_REG_AR3]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
increase_addr_reg(DSP_REG_AR3);
increment_addr_reg(DSP_REG_AR0);
}
@ -279,8 +304,10 @@ void DSPEmitter::slnm(const UDSPInstruction opc)
u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
ext_dmem_write(DSP_REG_AR0, sreg);
ext_dmem_read(g_dsp.r[DSP_REG_AR3]);
MOV(16, M(&g_dsp.r[dreg]), R(EAX));
writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
increase_addr_reg(DSP_REG_AR3);
increase_addr_reg(DSP_REG_AR0);
}
@ -300,7 +327,7 @@ void DSPEmitter::ld(const UDSPInstruction opc)
u8 dreg = (opc >> 5) & 0x1;
u8 rreg = (opc >> 4) & 0x1;
u8 sreg = opc & 0x3;
/*
if (sreg != DSP_REG_AR3) {
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[sreg]));
@ -320,7 +347,7 @@ void DSPEmitter::ld(const UDSPInstruction opc)
increment_addr_reg(dreg);
}
*/
increment_addr_reg(DSP_REG_AR3);
}
@ -331,7 +358,7 @@ void DSPEmitter::ldn(const UDSPInstruction opc)
u8 dreg = (opc >> 5) & 0x1;
u8 rreg = (opc >> 4) & 0x1;
u8 sreg = opc & 0x3;
/*
if (sreg != DSP_REG_AR3) {
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[sreg]));
@ -351,7 +378,7 @@ void DSPEmitter::ldn(const UDSPInstruction opc)
increase_addr_reg(dreg);
}
*/
increment_addr_reg(DSP_REG_AR3);
}
@ -362,7 +389,7 @@ void DSPEmitter::ldm(const UDSPInstruction opc)
u8 dreg = (opc >> 5) & 0x1;
u8 rreg = (opc >> 4) & 0x1;
u8 sreg = opc & 0x3;
/*
if (sreg != DSP_REG_AR3) {
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[sreg]));
@ -382,7 +409,7 @@ void DSPEmitter::ldm(const UDSPInstruction opc)
increment_addr_reg(dreg);
}
*/
increase_addr_reg(DSP_REG_AR3);
}
@ -393,7 +420,7 @@ void DSPEmitter::ldnm(const UDSPInstruction opc)
u8 dreg = (opc >> 5) & 0x1;
u8 rreg = (opc >> 4) & 0x1;
u8 sreg = opc & 0x3;
/*
if (sreg != DSP_REG_AR3) {
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[sreg]));
@ -413,7 +440,7 @@ void DSPEmitter::ldnm(const UDSPInstruction opc)
increase_addr_reg(dreg);
}
*/
increase_addr_reg(DSP_REG_AR3);
}

44
Source/Core/DSPCore/Src/Jit/DSPJitUtil.cpp
View File

@ -213,27 +213,49 @@ void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
FixupBranch ifx = J_CC(CC_NZ);
// g_dsp.dram[addr & DSP_DRAM_MASK] = val;
// FIXME this wont work on 64bit
AND(16, R(EAX), Imm16(DSP_DRAM_MASK));
// MOVZX(32, 16, M);
MOV(16, MDisp(EAX, (int)&g_dsp.dram[0]), R(ECX));
FixupBranch end = J();
// else if (saddr == 0xf)
SetJumpTarget(ifx);
// gdsp_ifx_write(addr, val);
// Does it mean gdsp_ifx_write needs u32 rather than u16?
ABI_CallFunctionRR((void *)gdsp_ifx_write, EAX, ECX);
SetJumpTarget(end);
}
u16 DSPEmitter::ext_dmem_read(u16 addr)
// EAX should have the return value
void DSPEmitter::ext_dmem_read(u16 addr)
{
u16 saddr = addr >> 12;
if (saddr == 0)
return g_dsp.dram[addr & DSP_DRAM_MASK];
else if (saddr == 0x1)
return g_dsp.coef[addr & DSP_COEF_MASK];
else if (saddr == 0xf)
return gdsp_ifx_read(addr);
MOVZX(32, 16, ECX, M(&addr));
return 0;
// u16 saddr = addr >> 12;
MOVZX(32, 16, ESI, R(EAX));
SHR(16, R(ESI), Imm16(12));
// if (saddr == 0)
CMP(16, R(ESI), Imm16(0));
FixupBranch dram = J_CC(CC_NZ);
// return g_dsp.dram[addr & DSP_DRAM_MASK];
AND(16, R(ECX), Imm16(DSP_DRAM_MASK));
FixupBranch end = J();
SetJumpTarget(dram);
// else if (saddr == 0x1)
CMP(16, R(ESI), Imm16(0x1));
FixupBranch ifx = J_CC(CC_NZ);
// return g_dsp.coef[addr & DSP_COEF_MASK];
AND(16, R(ECX), Imm16(DSP_COEF_MASK));
FixupBranch end2 = J();
SetJumpTarget(ifx);
// else if (saddr == 0xf)
// return gdsp_ifx_read(addr);
ABI_CallFunctionR((void *)gdsp_ifx_read, ECX);
SetJumpTarget(end);
SetJumpTarget(end2);
}
#endif