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stfsx is now implemented in 64-bit, too. 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@1603 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
hrydgard 2008-12-20 11:18:23 +00:00
parent 7adccb616f
commit 4f4edc05a0
1 changed files with 2 additions and 8 deletions
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10
Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStoreFloating.cpp
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@ -47,6 +47,7 @@ const u8 GC_ALIGNED16(bswapShuffle1x8Dupe[16]) = {7, 6, 5, 4, 3, 2, 1, 0, 7, 6,
const u8 GC_ALIGNED16(bswapShuffle2x8[16]) = {7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8}; const u8 GC_ALIGNED16(bswapShuffle2x8[16]) = {7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8};
namespace { namespace {
u64 GC_ALIGNED16(temp64); u64 GC_ALIGNED16(temp64);
u32 GC_ALIGNED16(temp32); u32 GC_ALIGNED16(temp32);
} }
@ -275,23 +276,16 @@ void Jit64::stfsx(UGeckoInstruction inst)
INSTRUCTION_START; INSTRUCTION_START;
// We can take a shortcut here - it's not likely that a hardware access would use this instruction. // We can take a shortcut here - it's not likely that a hardware access would use this instruction.
#ifdef _M_X64
// TODO
Default(inst); return;
#else
gpr.FlushLockX(ABI_PARAM1); gpr.FlushLockX(ABI_PARAM1);
fpr.Lock(inst.RS); fpr.Lock(inst.RS);
MOV(32, R(ABI_PARAM1), gpr.R(inst.RB)); MOV(32, R(ABI_PARAM1), gpr.R(inst.RB));
if (inst.RA) if (inst.RA)
ADD(32, R(ABI_PARAM1), gpr.R(inst.RA)); ADD(32, R(ABI_PARAM1), gpr.R(inst.RA));
AND(32, R(ABI_PARAM1), Imm32(Memory::MEMVIEW32_MASK));
CVTSD2SS(XMM0, fpr.R(inst.RS)); CVTSD2SS(XMM0, fpr.R(inst.RS));
MOVD_xmm(R(EAX), XMM0); MOVD_xmm(R(EAX), XMM0);
BSWAP(32, EAX); UnsafeWriteRegToReg(EAX, ABI_PARAM1, 32, 0);
MOV(32, MDisp(ABI_PARAM1, (u32)Memory::base), R(EAX));
gpr.UnlockAllX(); gpr.UnlockAllX();
fpr.UnlockAll(); fpr.UnlockAll();
#endif
} }