Merge pull request #6933 from lioncash/sign
Interpreter_SystemRegisters: Get rid of implicit sign conversions
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commit
4e63117501
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@ -87,15 +87,15 @@ void Interpreter::mtfsfix(UGeckoInstruction inst)
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void Interpreter::mtfsfx(UGeckoInstruction inst)
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{
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u32 fm = inst.FM;
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const u32 fm = inst.FM;
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u32 m = 0;
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for (int i = 0; i < 8; i++)
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for (u32 i = 0; i < 8; i++)
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{
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if (fm & (1 << i))
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m |= (0xF << (i * 4));
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if (fm & (1U << i))
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m |= (0xFU << (i * 4));
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}
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FPSCR.Hex = (FPSCR.Hex & ~m) | ((u32)(riPS0(inst.FB)) & m);
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FPSCR.Hex = (FPSCR.Hex & ~m) | (static_cast<u32>(riPS0(inst.FB)) & m);
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FPSCRtoFPUSettings(FPSCR);
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if (inst.Rc)
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@ -116,7 +116,7 @@ void Interpreter::mfcr(UGeckoInstruction inst)
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void Interpreter::mtcrf(UGeckoInstruction inst)
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{
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u32 crm = inst.CRM;
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const u32 crm = inst.CRM;
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if (crm == 0xFF)
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{
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PowerPC::SetCR(rGPR[inst.RS]);
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@ -125,10 +125,10 @@ void Interpreter::mtcrf(UGeckoInstruction inst)
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{
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// TODO: use lookup table? probably not worth it
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u32 mask = 0;
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for (int i = 0; i < 8; i++)
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for (u32 i = 0; i < 8; i++)
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{
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if (crm & (1 << i))
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mask |= 0xF << (i * 4);
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if (crm & (1U << i))
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mask |= 0xFU << (i * 4);
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}
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PowerPC::SetCR((PowerPC::GetCR() & ~mask) | (rGPR[inst.RS] & mask));
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@ -148,7 +148,7 @@ void Interpreter::mfsr(UGeckoInstruction inst)
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void Interpreter::mfsrin(UGeckoInstruction inst)
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{
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int index = (rGPR[inst.RB] >> 28) & 0xF;
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const u32 index = (rGPR[inst.RB] >> 28) & 0xF;
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rGPR[inst.RD] = PowerPC::ppcState.sr[index];
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}
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@ -162,7 +162,7 @@ void Interpreter::mtmsr(UGeckoInstruction inst)
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// Segment registers. MMU control.
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static void SetSR(int index, u32 value)
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static void SetSR(u32 index, u32 value)
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{
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DEBUG_LOG(POWERPC, "%08x: MMU: Segment register %i set to %08x", PowerPC::ppcState.pc, index,
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value);
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@ -171,21 +171,21 @@ static void SetSR(int index, u32 value)
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void Interpreter::mtsr(UGeckoInstruction inst)
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{
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int index = inst.SR;
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u32 value = rGPR[inst.RS];
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const u32 index = inst.SR;
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const u32 value = rGPR[inst.RS];
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SetSR(index, value);
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}
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void Interpreter::mtsrin(UGeckoInstruction inst)
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{
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int index = (rGPR[inst.RB] >> 28) & 0xF;
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u32 value = rGPR[inst.RS];
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const u32 index = (rGPR[inst.RB] >> 28) & 0xF;
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const u32 value = rGPR[inst.RS];
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SetSR(index, value);
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}
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void Interpreter::mftb(UGeckoInstruction inst)
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{
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const int index = (inst.TBR >> 5) | ((inst.TBR & 0x1F) << 5);
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const u32 index = (inst.TBR >> 5) | ((inst.TBR & 0x1F) << 5);
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DEBUG_ASSERT_MSG(POWERPC, (index == SPR_TL) || (index == SPR_TU), "Invalid mftb");
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(void)index;
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mfspr(inst);
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@ -385,7 +385,7 @@ void Interpreter::mtspr(UGeckoInstruction inst)
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case SPR_DBAT7U:
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if (old_value != rSPR(index))
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{
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INFO_LOG(POWERPC, "DBAT updated %d %x %x", index, old_value, rSPR(index));
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INFO_LOG(POWERPC, "DBAT updated %u %x %x", index, old_value, rSPR(index));
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PowerPC::DBATUpdated();
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}
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break;
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@ -408,7 +408,7 @@ void Interpreter::mtspr(UGeckoInstruction inst)
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case SPR_IBAT7U:
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if (old_value != rSPR(index))
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{
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INFO_LOG(POWERPC, "IBAT updated %d %x %x", index, old_value, rSPR(index));
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INFO_LOG(POWERPC, "IBAT updated %u %x %x", index, old_value, rSPR(index));
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PowerPC::IBATUpdated();
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}
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break;
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