PowerPC: Remove unnecessary const on function declaration parameters
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@ -206,20 +206,20 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst);
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// Routines for debugger UI, cheats, etc. to access emulated memory from the
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// Routines for debugger UI, cheats, etc. to access emulated memory from the
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// perspective of the CPU. Not for use by core emulation routines.
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// perspective of the CPU. Not for use by core emulation routines.
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// Use "Host_" prefix.
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// Use "Host_" prefix.
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u8 HostRead_U8(const u32 address);
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u8 HostRead_U8(u32 address);
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u16 HostRead_U16(const u32 address);
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u16 HostRead_U16(u32 address);
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u32 HostRead_U32(const u32 address);
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u32 HostRead_U32(u32 address);
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u64 HostRead_U64(const u32 address);
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u64 HostRead_U64(u32 address);
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u32 HostRead_Instruction(const u32 address);
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u32 HostRead_Instruction(u32 address);
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void HostWrite_U8(const u8 var, const u32 address);
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void HostWrite_U8(u8 var, u32 address);
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void HostWrite_U16(const u16 var, const u32 address);
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void HostWrite_U16(u16 var, u32 address);
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void HostWrite_U32(const u32 var, const u32 address);
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void HostWrite_U32(u32 var, u32 address);
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void HostWrite_U64(const u64 var, const u32 address);
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void HostWrite_U64(u64 var, u32 address);
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// Returns whether a read or write to the given address will resolve to a RAM
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// Returns whether a read or write to the given address will resolve to a RAM
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// access given the current CPU state.
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// access given the current CPU state.
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bool HostIsRAMAddress(const u32 address);
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bool HostIsRAMAddress(u32 address);
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// Same as HostIsRAMAddress, but uses IBAT instead of DBAT.
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// Same as HostIsRAMAddress, but uses IBAT instead of DBAT.
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bool HostIsInstructionRAMAddress(u32 address);
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bool HostIsInstructionRAMAddress(u32 address);
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@ -228,7 +228,7 @@ std::string HostGetString(u32 em_address, size_t size = 0);
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// Routines for the CPU core to access memory.
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// Routines for the CPU core to access memory.
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// Used by interpreter to read instructions, uses iCache
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// Used by interpreter to read instructions, uses iCache
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u32 Read_Opcode(const u32 address);
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u32 Read_Opcode(u32 address);
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struct TryReadInstResult
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struct TryReadInstResult
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{
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{
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bool valid;
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bool valid;
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@ -236,36 +236,36 @@ struct TryReadInstResult
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u32 hex;
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u32 hex;
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u32 physical_address;
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u32 physical_address;
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};
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};
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TryReadInstResult TryReadInstruction(const u32 address);
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TryReadInstResult TryReadInstruction(u32 address);
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u8 Read_U8(const u32 address);
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u8 Read_U8(u32 address);
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u16 Read_U16(const u32 address);
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u16 Read_U16(u32 address);
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u32 Read_U32(const u32 address);
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u32 Read_U32(u32 address);
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u64 Read_U64(const u32 address);
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u64 Read_U64(u32 address);
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// Useful helper functions, used by ARM JIT
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// Useful helper functions, used by ARM JIT
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float Read_F32(const u32 address);
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float Read_F32(u32 address);
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double Read_F64(const u32 address);
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double Read_F64(u32 address);
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// used by JIT. Return zero-extended 32bit values
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// used by JIT. Return zero-extended 32bit values
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u32 Read_U8_ZX(const u32 address);
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u32 Read_U8_ZX(u32 address);
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u32 Read_U16_ZX(const u32 address);
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u32 Read_U16_ZX(u32 address);
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void Write_U8(const u8 var, const u32 address);
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void Write_U8(u8 var, u32 address);
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void Write_U16(const u16 var, const u32 address);
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void Write_U16(u16 var, u32 address);
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void Write_U32(const u32 var, const u32 address);
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void Write_U32(u32 var, u32 address);
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void Write_U64(const u64 var, const u32 address);
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void Write_U64(u64 var, u32 address);
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void Write_U16_Swap(const u16 var, const u32 address);
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void Write_U16_Swap(u16 var, u32 address);
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void Write_U32_Swap(const u32 var, const u32 address);
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void Write_U32_Swap(u32 var, u32 address);
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void Write_U64_Swap(const u64 var, const u32 address);
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void Write_U64_Swap(u64 var, u32 address);
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// Useful helper functions, used by ARM JIT
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// Useful helper functions, used by ARM JIT
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void Write_F64(const double var, const u32 address);
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void Write_F64(double var, u32 address);
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void DMA_LCToMemory(const u32 memAddr, const u32 cacheAddr, const u32 numBlocks);
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void DMA_LCToMemory(u32 memAddr, u32 cacheAddr, u32 numBlocks);
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void DMA_MemoryToLC(const u32 cacheAddr, const u32 memAddr, const u32 numBlocks);
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void DMA_MemoryToLC(u32 cacheAddr, u32 memAddr, u32 numBlocks);
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void ClearCacheLine(const u32 address); // Zeroes 32 bytes; address should be 32-byte-aligned
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void ClearCacheLine(u32 address); // Zeroes 32 bytes; address should be 32-byte-aligned
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// TLB functions
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// TLB functions
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void SDRUpdated();
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void SDRUpdated();
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@ -276,7 +276,7 @@ void IBATUpdated();
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// Result changes based on the BAT registers and MSR.DR. Returns whether
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// Result changes based on the BAT registers and MSR.DR. Returns whether
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// it's safe to optimize a read or write to this address to an unguarded
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// it's safe to optimize a read or write to this address to an unguarded
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// memory access. Does not consider page tables.
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// memory access. Does not consider page tables.
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bool IsOptimizableRAMAddress(const u32 address);
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bool IsOptimizableRAMAddress(u32 address);
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u32 IsOptimizableMMIOAccess(u32 address, u32 accessSize);
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u32 IsOptimizableMMIOAccess(u32 address, u32 accessSize);
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bool IsOptimizableGatherPipeWrite(u32 address);
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bool IsOptimizableGatherPipeWrite(u32 address);
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