Revert "FastMem: don't let the backpatcher hit the same location twice"
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4e8cc952bb
commit
4c2a542f1e
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@ -221,8 +221,6 @@ void Jit64::ClearCache()
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{
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{
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blocks.Clear();
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blocks.Clear();
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trampolines.ClearCodeSpace();
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trampolines.ClearCodeSpace();
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jit->js.pcAtLoc.clear();
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jit->js.registersInUseAtLoc.clear();
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farcode.ClearCodeSpace();
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farcode.ClearCodeSpace();
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ClearCodeSpace();
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ClearCodeSpace();
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m_clear_cache_asap = false;
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m_clear_cache_asap = false;
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@ -65,21 +65,14 @@ bool Jitx86Base::BackPatch(u32 emAddress, SContext* ctx)
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return false;
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return false;
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}
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}
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auto pc_it = jit->js.pcAtLoc.find(codePtr);
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auto it = registersInUseAtLoc.find(codePtr);
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if (pc_it == jit->js.pcAtLoc.end())
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if (it == registersInUseAtLoc.end())
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{
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{
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PanicAlert("BackPatch: no pc entry for address %p", codePtr);
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PanicAlert("BackPatch: no register use entry for address %p", codePtr);
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return nullptr;
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}
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u32 pc = pc_it->second;
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auto reguse_it = jit->js.registersInUseAtLoc.find(pc);
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if (reguse_it == jit->js.registersInUseAtLoc.end())
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{
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PanicAlert("BackPatch: no register use entry for PC %x", pc);
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return false;
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return false;
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}
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}
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u32 registersInUse = reguse_it->second;
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u32 registersInUse = it->second;
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if (!info.isMemoryWrite)
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if (!info.isMemoryWrite)
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{
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{
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@ -104,7 +97,16 @@ bool Jitx86Base::BackPatch(u32 emAddress, SContext* ctx)
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}
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}
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else
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else
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{
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{
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// TODO: special case FIFO writes
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// TODO: special case FIFO writes. Also, support 32-bit mode.
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it = pcAtLoc.find(codePtr);
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if (it == pcAtLoc.end())
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{
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PanicAlert("BackPatch: no pc entry for address %p", codePtr);
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return nullptr;
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}
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u32 pc = it->second;
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u8 *start;
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u8 *start;
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if (info.byteSwap || info.hasImmediate)
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if (info.byteSwap || info.hasImmediate)
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{
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{
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@ -99,8 +99,6 @@ protected:
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JitBlock *curBlock;
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JitBlock *curBlock;
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std::unordered_set<u32> fifoWriteAddresses;
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std::unordered_set<u32> fifoWriteAddresses;
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std::unordered_map<u32, u32> registersInUseAtLoc;
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std::unordered_map<u8 *, u32> pcAtLoc;
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};
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};
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PPCAnalyst::CodeBlock code_block;
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PPCAnalyst::CodeBlock code_block;
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@ -339,19 +339,14 @@ using namespace Gen;
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block_map.erase(it1, it2);
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block_map.erase(it1, it2);
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}
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}
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// If the code was actually modified, we need to clear the relevant entries from the
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// FIFO write address cache, so we don't end up with FIFO checks in places they shouldn't
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// be (this can clobber flags, and thus break any optimization that relies on flags
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// being in the right place between instructions).
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if (!forced)
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if (!forced)
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{
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{
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for (u32 i = address; i < address + length; i += 4)
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for (u32 i = address; i < address + length; i += 4)
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{
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// If the code was actually modified, we need to clear the relevant entries from the
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// FIFO write address cache, so we don't end up with FIFO checks in places they shouldn't
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// be (this can clobber flags, and thus break any optimization that relies on flags
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// being in the right place between instructions).
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jit->js.fifoWriteAddresses.erase(i);
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jit->js.fifoWriteAddresses.erase(i);
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// We use these entries to determine whether there's a fastmem fault at this location,
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// so clear it since the block is being replaced.
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jit->js.registersInUseAtLoc.erase(i);
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}
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}
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}
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}
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}
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}
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}
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@ -299,8 +299,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg & opAddress,
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if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bMMU &&
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if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bMMU &&
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SConfig::GetInstance().m_LocalCoreStartupParameter.bFastmem &&
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SConfig::GetInstance().m_LocalCoreStartupParameter.bFastmem &&
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!opAddress.IsImm() &&
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!opAddress.IsImm() &&
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!(flags & (SAFE_LOADSTORE_NO_SWAP | SAFE_LOADSTORE_NO_FASTMEM)) &&
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!(flags & (SAFE_LOADSTORE_NO_SWAP | SAFE_LOADSTORE_NO_FASTMEM))
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jit->js.registersInUseAtLoc.find(jit->js.compilerPC) == jit->js.registersInUseAtLoc.end()
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#ifdef ENABLE_MEM_CHECK
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#ifdef ENABLE_MEM_CHECK
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&& !SConfig::GetInstance().m_LocalCoreStartupParameter.bEnableDebugging
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&& !SConfig::GetInstance().m_LocalCoreStartupParameter.bEnableDebugging
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#endif
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#endif
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@ -308,8 +307,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg & opAddress,
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{
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{
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u8 *mov = UnsafeLoadToReg(reg_value, opAddress, accessSize, offset, signExtend);
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u8 *mov = UnsafeLoadToReg(reg_value, opAddress, accessSize, offset, signExtend);
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jit->js.pcAtLoc[mov] = jit->js.compilerPC;
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registersInUseAtLoc[mov] = registersInUse;
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jit->js.registersInUseAtLoc[jit->js.compilerPC] = registersInUse;
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}
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}
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else
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else
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{
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{
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@ -484,8 +482,7 @@ void EmuCodeBlock::SafeWriteRegToReg(OpArg reg_value, X64Reg reg_addr, int acces
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if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bMMU &&
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if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bMMU &&
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SConfig::GetInstance().m_LocalCoreStartupParameter.bFastmem &&
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SConfig::GetInstance().m_LocalCoreStartupParameter.bFastmem &&
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!(flags & SAFE_LOADSTORE_NO_FASTMEM) &&
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!(flags & SAFE_LOADSTORE_NO_FASTMEM) &&
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(reg_value.IsImm() || !(flags & SAFE_LOADSTORE_NO_SWAP)) &&
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(reg_value.IsImm() || !(flags & SAFE_LOADSTORE_NO_SWAP))
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jit->js.registersInUseAtLoc.find(jit->js.compilerPC) == jit->js.registersInUseAtLoc.end()
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#ifdef ENABLE_MEM_CHECK
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#ifdef ENABLE_MEM_CHECK
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&& !SConfig::GetInstance().m_LocalCoreStartupParameter.bEnableDebugging
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&& !SConfig::GetInstance().m_LocalCoreStartupParameter.bEnableDebugging
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#endif
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#endif
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@ -499,8 +496,8 @@ void EmuCodeBlock::SafeWriteRegToReg(OpArg reg_value, X64Reg reg_addr, int acces
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NOP(padding);
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NOP(padding);
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}
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}
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jit->js.pcAtLoc[mov] = jit->js.compilerPC;
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registersInUseAtLoc[mov] = registersInUse;
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jit->js.registersInUseAtLoc[jit->js.compilerPC] = registersInUse;
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pcAtLoc[mov] = jit->js.compilerPC;
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return;
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return;
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}
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}
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@ -136,4 +136,7 @@ public:
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void ConvertSingleToDouble(Gen::X64Reg dst, Gen::X64Reg src, bool src_is_gpr = false);
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void ConvertSingleToDouble(Gen::X64Reg dst, Gen::X64Reg src, bool src_is_gpr = false);
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void ConvertDoubleToSingle(Gen::X64Reg dst, Gen::X64Reg src);
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void ConvertDoubleToSingle(Gen::X64Reg dst, Gen::X64Reg src);
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void SetFPRF(Gen::X64Reg xmm);
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void SetFPRF(Gen::X64Reg xmm);
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protected:
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std::unordered_map<u8 *, u32> registersInUseAtLoc;
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std::unordered_map<u8 *, u32> pcAtLoc;
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};
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};
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