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Merge pull request #9371 from MerryMage/rlwinmx-BEXTR 

Jit_Integer: rlwinmx: Use BEXTR where possible
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LC 2020-12-27 22:24:17 -05:00 committed by GitHub
parent fcd86e9b21 73b6166f18
commit 4b24215efb
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1 changed files with 8 additions and 0 deletions
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8
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
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@ -1541,6 +1541,7 @@ void Jit64::rlwinmx(UGeckoInstruction inst)
{ {
const bool left_shift = inst.SH && inst.MB == 0 && inst.ME == 31 - inst.SH; const bool left_shift = inst.SH && inst.MB == 0 && inst.ME == 31 - inst.SH;
const bool right_shift = inst.SH && inst.ME == 31 && inst.MB == 32 - inst.SH; const bool right_shift = inst.SH && inst.ME == 31 && inst.MB == 32 - inst.SH;
const bool field_extract = inst.SH && inst.ME == 31 && inst.MB > 32 - inst.SH;
const u32 mask = MakeRotationMask(inst.MB, inst.ME); const u32 mask = MakeRotationMask(inst.MB, inst.ME);
const u32 prerotate_mask = Common::RotateRight(mask, inst.SH); const u32 prerotate_mask = Common::RotateRight(mask, inst.SH);
const bool simple_mask = mask == 0xff || mask == 0xffff; const bool simple_mask = mask == 0xff || mask == 0xffff;
@ -1574,6 +1575,13 @@ void Jit64::rlwinmx(UGeckoInstruction inst)
ROL(32, Ra, Imm8(inst.SH)); ROL(32, Ra, Imm8(inst.SH));
needs_sext = (mask & 0x80000000) != 0; needs_sext = (mask & 0x80000000) != 0;
} }
// Use BEXTR where possible: Only AMD implements this in one uop
else if (field_extract && cpu_info.bBMI1 && cpu_info.vendor == CPUVendor::AMD)
{
MOV(32, R(RSCRATCH), Imm32((mask_size << 8) | (32 - inst.SH)));
BEXTR(32, Ra, Rs, RSCRATCH);
needs_sext = false;
}
else else
{ {
if (a != s) if (a != s)