Jit: Swap locations of effectiveAddress and msrBits

This slightly improves instruction-level parallelism in Jit64's slow
dispatcher by shifting the PC left instead of the MSR.

In the past, this also enabled an optimization in JitArm64's fast path
where we could use LDP to load normalEntry and msrBits in one
instruction, but this was superseded by fd9c970.

Source/Core/Core/PowerPC/Jit64/JitAsm.cpp

@@ -19,11 +19,6 @@
 #include "Core/System.h"
 
 using namespace Gen;
-
-// These need to be next of each other so that the assembly
-// code can compare them easily.
-static_assert(offsetof(JitBlockData, effectiveAddress) + 4 == offsetof(JitBlockData, msrBits));
-
 Jit64AsmRoutineManager::Jit64AsmRoutineManager(Jit64& jit) : CommonAsmRoutines(jit)
 {
 }
@@ -168,12 +163,14 @@ void Jit64AsmRoutineManager::Generate()
       // Check block.msrBits.
       MOV(32, R(RSCRATCH2), PPCSTATE(msr));
       AND(32, R(RSCRATCH2), Imm32(JitBaseBlockCache::JIT_CACHE_MSR_MASK));
-      // Also check the block.effectiveAddress
-      SHL(64, R(RSCRATCH2), Imm8(32));
-      // RSCRATCH_EXTRA still has the PC.
+      // Also check the block.effectiveAddress. RSCRATCH_EXTRA still has the PC.
+      SHL(64, R(RSCRATCH_EXTRA), Imm8(32));
       OR(64, R(RSCRATCH2), R(RSCRATCH_EXTRA));
-      CMP(64, R(RSCRATCH2),
-          MDisp(RSCRATCH, static_cast<s32>(offsetof(JitBlockData, effectiveAddress))));
+
+      static_assert(offsetof(JitBlockData, msrBits) + 4 ==
+                    offsetof(JitBlockData, effectiveAddress));
+
+      CMP(64, R(RSCRATCH2), MDisp(RSCRATCH, static_cast<s32>(offsetof(JitBlockData, msrBits))));
 
       state_mismatch = J_CC(CC_NE);
       // Success; branch to the block we found.

Source/Core/Core/PowerPC/JitCommon/JitCache.h

@@ -33,10 +33,10 @@ struct JitBlockData
   // The normal entry point for the block, returned by Dispatch().
   u8* normalEntry;
 
-  // The effective address (PC) for the beginning of the block.
-  u32 effectiveAddress;
   // The MSR bits expected for this block to be valid; see JIT_CACHE_MSR_MASK.
   u32 msrBits;
+  // The effective address (PC) for the beginning of the block.
+  u32 effectiveAddress;
   // The physical address of the code represented by this block.
   // Various maps in the cache are indexed by this (block_map
   // and valid_block in particular). This is useful because of