Jit_Integer: rlwimix: Handle all gpr.IsImm(a) cases
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@ -1690,15 +1690,20 @@ void Jit64::rlwimix(UGeckoInstruction inst)
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AndWithMask(Ra, ~mask);
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AndWithMask(Ra, ~mask);
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OR(32, Ra, Imm32(Common::RotateLeft(gpr.Imm32(s), inst.SH) & mask));
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OR(32, Ra, Imm32(Common::RotateLeft(gpr.Imm32(s), inst.SH) & mask));
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}
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}
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else if (inst.SH && gpr.IsImm(a))
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else if (gpr.IsImm(a))
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{
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{
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u32 maskA = gpr.Imm32(a) & ~mask;
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const u32 maskA = gpr.Imm32(a) & ~mask;
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RCOpArg Rs = gpr.Use(s, RCMode::Read);
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RCOpArg Rs = gpr.Use(s, RCMode::Read);
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RCX64Reg Ra = gpr.Bind(a, RCMode::Write);
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RCX64Reg Ra = gpr.Bind(a, RCMode::Write);
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RegCache::Realize(Rs, Ra);
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RegCache::Realize(Rs, Ra);
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if (left_shift)
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if (inst.SH == 0)
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{
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MOV(32, Ra, Rs);
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AndWithMask(Ra, mask);
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}
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else if (left_shift)
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{
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{
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MOV(32, Ra, Rs);
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MOV(32, Ra, Rs);
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SHL(32, Ra, Imm8(inst.SH));
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SHL(32, Ra, Imm8(inst.SH));
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@ -1713,7 +1718,11 @@ void Jit64::rlwimix(UGeckoInstruction inst)
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RotateLeft(32, Ra, Rs, inst.SH);
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RotateLeft(32, Ra, Rs, inst.SH);
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AndWithMask(Ra, mask);
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AndWithMask(Ra, mask);
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}
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}
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if (maskA)
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OR(32, Ra, Imm32(maskA));
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OR(32, Ra, Imm32(maskA));
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else
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needs_test = true;
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}
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}
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else if (inst.SH)
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else if (inst.SH)
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{
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{
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