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Merge pull request #4606 from BhaaLseN/clang-format-union 

specify custom brace style to fix unions
This commit is contained in:
Mat M 2017-01-05 14:27:27 -05:00 committed by GitHub
parent 9da6982ac3 23d99f2f2c
commit 495580637f
47 changed files with 375 additions and 182 deletions
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14
Source/.clang-format
View File

@ -19,8 +19,20 @@ AlwaysBreakBeforeMultilineStrings: false
AlwaysBreakTemplateDeclarations: true AlwaysBreakTemplateDeclarations: true
BinPackArguments: true BinPackArguments: true
BinPackParameters: true BinPackParameters: true
BraceWrapping:
AfterClass: true
AfterControlStatement: true
AfterEnum: true
AfterFunction: true
AfterNamespace: true
AfterObjCDeclaration: true
AfterStruct: true
AfterUnion: true
BeforeCatch: true
BeforeElse: true
IndentBraces: false
BreakBeforeBinaryOperators: None BreakBeforeBinaryOperators: None
BreakBeforeBraces: Allman BreakBeforeBraces: Custom
BreakBeforeTernaryOperators: false BreakBeforeTernaryOperators: false
BreakConstructorInitializersBeforeComma: false BreakConstructorInitializersBeforeComma: false
ColumnLimit: 100 ColumnLimit: 100

3
Source/Core/Common/Arm64Emitter.cpp
View File

@ -2665,7 +2665,8 @@ void ARM64FloatEmitter::EncodeLoadStoreRegisterOffset(u32 size, bool load, ARM64
void ARM64FloatEmitter::EncodeModImm(bool Q, u8 op, u8 cmode, u8 o2, ARM64Reg Rd, u8 abcdefgh) void ARM64FloatEmitter::EncodeModImm(bool Q, u8 op, u8 cmode, u8 o2, ARM64Reg Rd, u8 abcdefgh)
{ {
union { union
{
u8 hex; u8 hex;
struct struct
{ {

6
Source/Core/Common/MathUtil.cpp
View File

@ -104,7 +104,8 @@ const int frsqrte_expected_dec[] = {
double ApproximateReciprocalSquareRoot(double val) double ApproximateReciprocalSquareRoot(double val)
{ {
union { union
{
double valf; double valf;
s64 vali; s64 vali;
}; };
@ -178,7 +179,8 @@ double ApproximateReciprocal(double val)
// The workaround for this is to just use namespace std within this function's scope // The workaround for this is to just use namespace std within this function's scope
// That way on real toolchains it will use the std:: variant like normal. // That way on real toolchains it will use the std:: variant like normal.
using namespace std; using namespace std;
union { union
{
double valf; double valf;
s64 vali; s64 vali;
}; };

6
Source/Core/Common/MathUtil.h
View File

@ -57,14 +57,16 @@ static const u64 DOUBLE_SIGN = 0x8000000000000000ULL, DOUBLE_EXP = 0x7FF00000000
static const u32 FLOAT_SIGN = 0x80000000, FLOAT_EXP = 0x7F800000, FLOAT_FRAC = 0x007FFFFF, static const u32 FLOAT_SIGN = 0x80000000, FLOAT_EXP = 0x7F800000, FLOAT_FRAC = 0x007FFFFF,
FLOAT_ZERO = 0x00000000; FLOAT_ZERO = 0x00000000;
union IntDouble { union IntDouble
{
double d; double d;
u64 i; u64 i;
explicit IntDouble(u64 _i) : i(_i) {} explicit IntDouble(u64 _i) : i(_i) {}
explicit IntDouble(double _d) : d(_d) {} explicit IntDouble(double _d) : d(_d) {}
}; };
union IntFloat { union IntFloat
{
float f; float f;
u32 i; u32 i;

3
Source/Core/Common/TraversalProto.h
View File

@ -52,7 +52,8 @@ struct TraversalPacket
{ {
u8 type; u8 type;
TraversalRequestId requestId; TraversalRequestId requestId;
union { union
{
struct struct
{ {
u8 ok; u8 ok;

3
Source/Core/Core/ActionReplay.cpp
View File

@ -89,7 +89,8 @@ static bool s_disable_logging = false;
struct ARAddr struct ARAddr
{ {
union { union
{
u32 address; u32 address;
struct struct
{ {

3
Source/Core/Core/Boot/ElfTypes.h
View File

@ -264,7 +264,8 @@ struct Elf32_Rela
struct Elf32_Dyn struct Elf32_Dyn
{ {
s32 d_tag; s32 d_tag;
union { union
{
u32 d_val; u32 d_val;
u32 d_ptr; u32 d_ptr;
} d_un; } d_un;

9
Source/Core/Core/DSP/DSPCore.h
View File

@ -225,7 +225,8 @@ struct DSP_Regs
u16 cr; u16 cr;
u16 sr; u16 sr;
union { union
{
u64 val; u64 val;
struct struct
{ {
@ -236,7 +237,8 @@ struct DSP_Regs
}; };
} prod; } prod;
union { union
{
u32 val; u32 val;
struct struct
{ {
@ -245,7 +247,8 @@ struct DSP_Regs
}; };
} ax[2]; } ax[2];
union { union
{
u64 val; u64 val;
struct struct
{ {

6
Source/Core/Core/FifoPlayer/FifoFileStruct.h
View File

@ -17,7 +17,8 @@ enum
#pragma pack(push, 4) #pragma pack(push, 4)
union FileHeader { union FileHeader
{
struct struct
{ {
u32 fileId; u32 fileId;
@ -40,7 +41,8 @@ union FileHeader {
u32 rawData[32]; u32 rawData[32];
}; };
union FileFrameInfo { union FileFrameInfo
{
struct struct
{ {
u64 fifoDataOffset; u64 fifoDataOffset;

6
Source/Core/Core/HW/AudioInterface.cpp
View File

@ -70,7 +70,8 @@ enum
}; };
// AI Control Register // AI Control Register
union AICR { union AICR
{
AICR() { hex = 0; } AICR() { hex = 0; }
AICR(u32 _hex) { hex = _hex; } AICR(u32 _hex) { hex = _hex; }
struct struct
@ -90,7 +91,8 @@ union AICR {
}; };
// AI Volume Register // AI Volume Register
union AIVR { union AIVR
{
AIVR() { hex = 0; } AIVR() { hex = 0; }
struct struct
{ {

9
Source/Core/Core/HW/DSP.cpp
View File

@ -65,7 +65,8 @@ enum
}; };
// UARAMCount // UARAMCount
union UARAMCount { union UARAMCount
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -75,7 +76,8 @@ union UARAMCount {
}; };
// Blocks are 32 bytes. // Blocks are 32 bytes.
union UAudioDMAControl { union UAudioDMAControl
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -139,7 +141,8 @@ static AudioDMA g_audioDMA;
static ARAM_DMA g_arDMA; static ARAM_DMA g_arDMA;
UDSPControl g_dspState; UDSPControl g_dspState;
union ARAM_Info { union ARAM_Info
{
u16 Hex; u16 Hex;
struct struct
{ {

3
Source/Core/Core/HW/DSP.h
View File

@ -31,7 +31,8 @@ enum
// UDSPControl // UDSPControl
constexpr u16 DSP_CONTROL_MASK = 0x0C07; constexpr u16 DSP_CONTROL_MASK = 0x0C07;
union UDSPControl { union UDSPControl
{
u16 Hex; u16 Hex;
struct struct
{ {

3
Source/Core/Core/HW/DSPHLE/UCodes/AXStructs.h
View File

@ -271,7 +271,8 @@ struct PBBiquadFilter
u16 a2; u16 a2;
}; };
union PBInfImpulseResponseWM { union PBInfImpulseResponseWM
{
PBLowPassFilter lpf; PBLowPassFilter lpf;
PBBiquadFilter biquad; PBBiquadFilter biquad;
}; };

3
Source/Core/Core/HW/DSPHLE/UCodes/AXVoice.h
View File

@ -41,7 +41,8 @@ namespace
#define HILO_TO_32(name) ((name##_hi << 16) | name##_lo) #define HILO_TO_32(name) ((name##_hi << 16) | name##_lo)
// Used to pass a large amount of buffers to the mixing function. // Used to pass a large amount of buffers to the mixing function.
union AXBuffers { union AXBuffers
{
struct struct
{ {
int* left; int* left;

24
Source/Core/Core/HW/DVDInterface.cpp
View File

@ -108,7 +108,8 @@ enum
}; };
// DI Status Register // DI Status Register
union UDISR { union UDISR
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -126,7 +127,8 @@ union UDISR {
}; };
// DI Cover Register // DI Cover Register
union UDICVR { union UDICVR
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -139,7 +141,8 @@ union UDICVR {
UDICVR(u32 _hex) { Hex = _hex; } UDICVR(u32 _hex) { Hex = _hex; }
}; };
union UDICMDBUF { union UDICMDBUF
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -151,7 +154,8 @@ union UDICMDBUF {
}; };
// DI DMA Address Register // DI DMA Address Register
union UDIMAR { union UDIMAR
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -166,7 +170,8 @@ union UDIMAR {
}; };
// DI DMA Address Length Register // DI DMA Address Length Register
union UDILENGTH { union UDILENGTH
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -181,7 +186,8 @@ union UDILENGTH {
}; };
// DI DMA Control Register // DI DMA Control Register
union UDICR { union UDICR
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -192,7 +198,8 @@ union UDICR {
}; };
}; };
union UDIIMMBUF { union UDIIMMBUF
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -204,7 +211,8 @@ union UDIIMMBUF {
}; };
// DI Config Register // DI Config Register
union UDICFG { union UDICFG
{
u32 Hex; u32 Hex;
struct struct
{ {

6
Source/Core/Core/HW/EXI_Channel.h
View File

@ -29,7 +29,8 @@ private:
}; };
// EXI Status Register - "Channel Parameter Register" // EXI Status Register - "Channel Parameter Register"
union UEXI_STATUS { union UEXI_STATUS
{
u32 Hex; u32 Hex;
// DO NOT obey the warning and give this struct a name. Things will fail. // DO NOT obey the warning and give this struct a name. Things will fail.
struct struct
@ -55,7 +56,8 @@ private:
}; };
// EXI Control Register // EXI Control Register
union UEXI_CONTROL { union UEXI_CONTROL
{
u32 Hex; u32 Hex;
struct struct
{ {

3
Source/Core/Core/HW/EXI_DeviceAD16.h
View File

@ -24,7 +24,8 @@ private:
read = 0xa2 read = 0xa2
}; };
union UAD16Reg { union UAD16Reg
{
u32 U32; u32 U32;
u32 U8[4]; u32 U8[4];
}; };

3
Source/Core/Core/HW/EXI_DeviceMic.h
View File

@ -38,7 +38,8 @@ private:
u32 m_position; u32 m_position;
int command; int command;
union UStatus { union UStatus
{
u16 U16; u16 U16;
u8 U8[2]; u8 U8[2];
struct struct

18
Source/Core/Core/HW/MemoryInterface.cpp
View File

@ -49,7 +49,8 @@ enum
MI_UNKNOWN2 = 0x05A, MI_UNKNOWN2 = 0x05A,
}; };
union MIRegion { union MIRegion
{
u32 hex; u32 hex;
struct struct
{ {
@ -58,7 +59,8 @@ union MIRegion {
}; };
}; };
union MIProtType { union MIProtType
{
u16 hex; u16 hex;
struct struct
{ {
@ -70,7 +72,8 @@ union MIProtType {
}; };
}; };
union MIIRQMask { union MIIRQMask
{
u16 hex; u16 hex;
struct struct
{ {
@ -83,7 +86,8 @@ union MIIRQMask {
}; };
}; };
union MIIRQFlag { union MIIRQFlag
{
u16 hex; u16 hex;
struct struct
{ {
@ -96,7 +100,8 @@ union MIIRQFlag {
}; };
}; };
union MIProtAddr { union MIProtAddr
{
u32 hex; u32 hex;
struct struct
{ {
@ -111,7 +116,8 @@ union MIProtAddr {
}; };
}; };
union MITimer { union MITimer
{
u32 hex; u32 hex;
struct struct
{ {

21
Source/Core/Core/HW/SI.cpp
View File

@ -59,7 +59,8 @@ enum
}; };
// SI Channel Output // SI Channel Output
union USIChannelOut { union USIChannelOut
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -71,7 +72,8 @@ union USIChannelOut {
}; };
// SI Channel Input High u32 // SI Channel Input High u32
union USIChannelIn_Hi { union USIChannelIn_Hi
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -85,7 +87,8 @@ union USIChannelIn_Hi {
}; };
// SI Channel Input Low u32 // SI Channel Input Low u32
union USIChannelIn_Lo { union USIChannelIn_Lo
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -106,7 +109,8 @@ struct SSIChannel
}; };
// SI Poll: Controls how often a device is polled // SI Poll: Controls how often a device is polled
union USIPoll { union USIPoll
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -125,7 +129,8 @@ union USIPoll {
}; };
// SI Communication Control Status Register // SI Communication Control Status Register
union USIComCSR { union USIComCSR
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -151,7 +156,8 @@ union USIComCSR {
}; };
// SI Status Register // SI Status Register
union USIStatusReg { union USIStatusReg
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -190,7 +196,8 @@ union USIStatusReg {
}; };
// SI EXI Clock Count // SI EXI Clock Count
union USIEXIClockCount { union USIEXIClockCount
{
u32 Hex; u32 Hex;
struct struct
{ {

3
Source/Core/Core/HW/SI_DeviceGCController.h
View File

@ -41,7 +41,8 @@ protected:
CMD_WRITE = 0x40 CMD_WRITE = 0x40
}; };
union UCommand { union UCommand
{
u32 Hex; u32 Hex;
struct struct
{ {

3
Source/Core/Core/HW/SI_DeviceKeyboard.h
View File

@ -26,7 +26,8 @@ protected:
CMD_POLL = 0x54 CMD_POLL = 0x54
}; };
union UCommand { union UCommand
{
u32 Hex; u32 Hex;
struct struct
{ {

6
Source/Core/Core/HW/Sram.h
View File

@ -37,7 +37,8 @@ distribution.
#include "Common/CommonTypes.h" #include "Common/CommonTypes.h"
#pragma pack(push, 1) #pragma pack(push, 1)
union SRAMFlags { union SRAMFlags
{
u8 Hex; u8 Hex;
struct struct
{ {
@ -53,7 +54,8 @@ union SRAMFlags {
}; };
}; };
union SRAM { union SRAM
{
u8 p_SRAM[64]; u8 p_SRAM[64];
struct // Stored configuration value from the system SRAM area struct // Stored configuration value from the system SRAM area
{ {

48
Source/Core/Core/HW/VideoInterface.h
View File

@ -79,7 +79,8 @@ enum
// VI_INTERLACE = 0x850, // ??? MYSTERY OLD CODE // VI_INTERLACE = 0x850, // ??? MYSTERY OLD CODE
}; };
union UVIVerticalTimingRegister { union UVIVerticalTimingRegister
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -91,7 +92,8 @@ union UVIVerticalTimingRegister {
UVIVerticalTimingRegister() { Hex = 0; } UVIVerticalTimingRegister() { Hex = 0; }
}; };
union UVIDisplayControlRegister { union UVIDisplayControlRegister
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -109,7 +111,8 @@ union UVIDisplayControlRegister {
UVIDisplayControlRegister() { Hex = 0; } UVIDisplayControlRegister() { Hex = 0; }
}; };
union UVIHorizontalTiming0 { union UVIHorizontalTiming0
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -126,7 +129,8 @@ union UVIHorizontalTiming0 {
}; };
}; };
union UVIHorizontalTiming1 { union UVIHorizontalTiming1
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -142,7 +146,8 @@ union UVIHorizontalTiming1 {
}; };
// Exists for both odd and even fields // Exists for both odd and even fields
union UVIVBlankTimingRegister { union UVIVBlankTimingRegister
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -158,7 +163,8 @@ union UVIVBlankTimingRegister {
}; };
// Exists for both odd and even fields // Exists for both odd and even fields
union UVIBurstBlankingRegister { union UVIBurstBlankingRegister
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -173,7 +179,8 @@ union UVIBurstBlankingRegister {
}; };
}; };
union UVIFBInfoRegister { union UVIFBInfoRegister
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -192,7 +199,8 @@ union UVIFBInfoRegister {
}; };
// VI Interrupt Register // VI Interrupt Register
union UVIInterruptRegister { union UVIInterruptRegister
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -210,7 +218,8 @@ union UVIInterruptRegister {
}; };
}; };
union UVILatchRegister { union UVILatchRegister
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -226,7 +235,8 @@ union UVILatchRegister {
}; };
}; };
union PictureConfigurationRegister { union PictureConfigurationRegister
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -236,7 +246,8 @@ union PictureConfigurationRegister {
}; };
}; };
union UVIHorizontalScaling { union UVIHorizontalScaling
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -250,7 +261,8 @@ union UVIHorizontalScaling {
}; };
// Used for tables 0-2 // Used for tables 0-2
union UVIFilterCoefTable3 { union UVIFilterCoefTable3
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -266,7 +278,8 @@ union UVIFilterCoefTable3 {
}; };
// Used for tables 3-6 // Used for tables 3-6
union UVIFilterCoefTable4 { union UVIFilterCoefTable4
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -288,7 +301,8 @@ struct SVIFilterCoefTables
}; };
// Debug video mode only, probably never used in Dolphin... // Debug video mode only, probably never used in Dolphin...
union UVIBorderBlankRegister { union UVIBorderBlankRegister
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -304,7 +318,8 @@ union UVIBorderBlankRegister {
}; };
// ntsc-j and component cable bits // ntsc-j and component cable bits
union UVIDTVStatus { union UVIDTVStatus
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -314,7 +329,8 @@ union UVIDTVStatus {
}; };
}; };
union UVIHorizontalStepping { union UVIHorizontalStepping
{
u16 Hex; u16 Hex;
struct struct
{ {

18
Source/Core/Core/HW/WiimoteEmu/WiimoteHid.h
View File

@ -87,7 +87,8 @@ struct wm_ir_extended
}; };
// Nunchuk // Nunchuk
union wm_nc_core { union wm_nc_core
{
u8 hex; u8 hex;
struct struct
@ -102,7 +103,8 @@ union wm_nc_core {
}; };
}; };
union wm_nc { union wm_nc
{
struct struct
{ {
// joystick x, y // joystick x, y
@ -137,7 +139,8 @@ union wm_nc {
} passthrough_data; } passthrough_data;
}; };
union wm_classic_extension_buttons { union wm_classic_extension_buttons
{
u16 hex; u16 hex;
struct struct
@ -181,7 +184,8 @@ union wm_classic_extension_buttons {
} passthrough_data; } passthrough_data;
}; };
union wm_classic_extension { union wm_classic_extension
{
// lx/ly/lz; left joystick // lx/ly/lz; left joystick
// rx/ry/rz; right joystick // rx/ry/rz; right joystick
// lt; left trigger // lt; left trigger
@ -283,7 +287,8 @@ struct wm_turntable_extension
u8 ltable1 : 5; u8 ltable1 : 5;
u8 dial1 : 3; u8 dial1 : 3;
union { union
{
u16 ltable2 : 1; u16 ltable2 : 1;
u16 bt; // buttons u16 bt; // buttons
}; };
@ -314,7 +319,8 @@ struct wm_motionplus_data
struct wm_report struct wm_report
{ {
u8 wm; u8 wm;
union { union
{
u8 data[0]; u8 data[0];
struct struct
{ {

3
Source/Core/Core/IPC_HLE/WII_Socket.h
View File

@ -174,7 +174,8 @@ class WiiSocket
{ {
u32 _CommandAddress; u32 _CommandAddress;
bool is_ssl; bool is_ssl;
union { union
{
NET_IOCTL net_type; NET_IOCTL net_type;
SSL_IOCTL ssl_type; SSL_IOCTL ssl_type;
}; };

3
Source/Core/Core/IPC_HLE/hci.h
View File

@ -2575,7 +2575,8 @@ struct btreq
{ {
char btr_name[HCI_DEVNAME_SIZE]; /* device name */ char btr_name[HCI_DEVNAME_SIZE]; /* device name */
union { union
{
struct struct
{ {
bdaddr_t btri_bdaddr; /* device bdaddr */ bdaddr_t btri_bdaddr; /* device bdaddr */

6
Source/Core/Core/IPC_HLE/l2cap.h
View File

@ -295,7 +295,8 @@ typedef struct
} l2cap_cfg_opt_t; } l2cap_cfg_opt_t;
/* L2CAP configuration option value */ /* L2CAP configuration option value */
typedef union { typedef union
{
uint16_t mtu; /* L2CAP_OPT_MTU */ uint16_t mtu; /* L2CAP_OPT_MTU */
uint16_t flush_timo; /* L2CAP_OPT_FLUSH_TIMO */ uint16_t flush_timo; /* L2CAP_OPT_FLUSH_TIMO */
l2cap_qos_t qos; /* L2CAP_OPT_QOS */ l2cap_qos_t qos; /* L2CAP_OPT_QOS */
@ -342,7 +343,8 @@ typedef struct
*/ */
} l2cap_info_rsp_cp; } l2cap_info_rsp_cp;
typedef union { typedef union
{
/* L2CAP_CONNLESS_MTU */ /* L2CAP_CONNLESS_MTU */
struct struct
{ {

3
Source/Core/Core/PowerPC/CachedInterpreter.h
View File

@ -42,7 +42,8 @@ private:
Instruction(const ConditionalCallback c, u32 d) Instruction(const ConditionalCallback c, u32 d)
: conditional_callback(c), data(d), type(INSTRUCTION_TYPE_CONDITIONAL){}; : conditional_callback(c), data(d), type(INSTRUCTION_TYPE_CONDITIONAL){};
union { union
{
const CommonCallback common_callback; const CommonCallback common_callback;
const ConditionalCallback conditional_callback; const ConditionalCallback conditional_callback;
}; };

54
Source/Core/Core/PowerPC/Gekko.h
View File

@ -11,7 +11,8 @@
// --- Gekko Instruction --- // --- Gekko Instruction ---
union UGeckoInstruction { union UGeckoInstruction
{
u32 hex; u32 hex;
UGeckoInstruction(u32 _hex) : hex(_hex) {} UGeckoInstruction(u32 _hex) : hex(_hex) {}
@ -311,7 +312,8 @@ enum EQuantizeType : u32
}; };
// GQR Register // GQR Register
union UGQR { union UGQR
{
BitField<0, 3, EQuantizeType> st_type; BitField<0, 3, EQuantizeType> st_type;
BitField<8, 6, u32> st_scale; BitField<8, 6, u32> st_scale;
BitField<16, 3, EQuantizeType> ld_type; BitField<16, 3, EQuantizeType> ld_type;
@ -324,7 +326,8 @@ union UGQR {
}; };
// FPU Register // FPU Register
union UFPR { union UFPR
{
u64 as_u64; u64 as_u64;
s64 as_s64; s64 as_s64;
double d; double d;
@ -339,7 +342,8 @@ union UFPR {
#define XER_OV_MASK 1 #define XER_OV_MASK 1
#define XER_SO_MASK 2 #define XER_SO_MASK 2
// XER // XER
union UReg_XER { union UReg_XER
{
struct struct
{ {
u32 BYTE_COUNT : 7; u32 BYTE_COUNT : 7;
@ -357,7 +361,8 @@ union UReg_XER {
}; };
// Machine State Register // Machine State Register
union UReg_MSR { union UReg_MSR
{
struct struct
{ {
u32 LE : 1; u32 LE : 1;
@ -418,7 +423,8 @@ enum FPSCRExceptionFlag : u32
}; };
// Floating Point Status and Control Register // Floating Point Status and Control Register
union UReg_FPSCR { union UReg_FPSCR
{
struct struct
{ {
// Rounding mode (towards: nearest, zero, +inf, -inf) // Rounding mode (towards: nearest, zero, +inf, -inf)
@ -484,7 +490,8 @@ union UReg_FPSCR {
}; };
// Hardware Implementation-Dependent Register 0 // Hardware Implementation-Dependent Register 0
union UReg_HID0 { union UReg_HID0
{
struct struct
{ {
u32 NOOPTI : 1; u32 NOOPTI : 1;
@ -522,7 +529,8 @@ union UReg_HID0 {
}; };
// Hardware Implementation-Dependent Register 2 // Hardware Implementation-Dependent Register 2
union UReg_HID2 { union UReg_HID2
{
struct struct
{ {
u32 : 16; u32 : 16;
@ -547,7 +555,8 @@ union UReg_HID2 {
}; };
// Hardware Implementation-Dependent Register 4 // Hardware Implementation-Dependent Register 4
union UReg_HID4 { union UReg_HID4
{
struct struct
{ {
u32 : 20; u32 : 20;
@ -569,7 +578,8 @@ union UReg_HID4 {
}; };
// SPR1 - Page Table format // SPR1 - Page Table format
union UReg_SPR1 { union UReg_SPR1
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -580,7 +590,8 @@ union UReg_SPR1 {
}; };
// MMCR0 - Monitor Mode Control Register 0 format // MMCR0 - Monitor Mode Control Register 0 format
union UReg_MMCR0 { union UReg_MMCR0
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -603,7 +614,8 @@ union UReg_MMCR0 {
}; };
// MMCR1 - Monitor Mode Control Register 1 format // MMCR1 - Monitor Mode Control Register 1 format
union UReg_MMCR1 { union UReg_MMCR1
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -614,7 +626,8 @@ union UReg_MMCR1 {
}; };
// Write Pipe Address Register // Write Pipe Address Register
union UReg_WPAR { union UReg_WPAR
{
struct struct
{ {
u32 BNE : 1; u32 BNE : 1;
@ -628,7 +641,8 @@ union UReg_WPAR {
}; };
// Direct Memory Access Upper register // Direct Memory Access Upper register
union UReg_DMAU { union UReg_DMAU
{
struct struct
{ {
u32 DMA_LEN_U : 5; u32 DMA_LEN_U : 5;
@ -641,7 +655,8 @@ union UReg_DMAU {
}; };
// Direct Memory Access Lower (DMAL) register // Direct Memory Access Lower (DMAL) register
union UReg_DMAL { union UReg_DMAL
{
struct struct
{ {
u32 DMA_F : 1; u32 DMA_F : 1;
@ -656,7 +671,8 @@ union UReg_DMAL {
UReg_DMAL() { Hex = 0; } UReg_DMAL() { Hex = 0; }
}; };
union UReg_BAT_Up { union UReg_BAT_Up
{
struct struct
{ {
u32 VP : 1; u32 VP : 1;
@ -671,7 +687,8 @@ union UReg_BAT_Up {
UReg_BAT_Up() { Hex = 0; } UReg_BAT_Up() { Hex = 0; }
}; };
union UReg_BAT_Lo { union UReg_BAT_Lo
{
struct struct
{ {
u32 PP : 2; u32 PP : 2;
@ -686,7 +703,8 @@ union UReg_BAT_Lo {
UReg_BAT_Lo() { Hex = 0; } UReg_BAT_Lo() { Hex = 0; }
}; };
union UReg_PTE { union UReg_PTE
{
struct struct
{ {
u64 API : 6; u64 API : 6;

6
Source/Core/Core/PowerPC/MMU.cpp
View File

@ -867,7 +867,8 @@ TranslateResult JitCache_TranslateAddress(u32 address)
#define PTE2_PP(v) ((v)&3) #define PTE2_PP(v) ((v)&3)
// Hey! these duplicate a structure in Gekko.h // Hey! these duplicate a structure in Gekko.h
union UPTE1 { union UPTE1
{
struct struct
{ {
u32 API : 6; u32 API : 6;
@ -878,7 +879,8 @@ union UPTE1 {
u32 Hex; u32 Hex;
}; };
union UPTE2 { union UPTE2
{
struct struct
{ {
u32 PP : 2; u32 PP : 2;

3
Source/Core/Core/ec_wii.h
View File

@ -68,7 +68,8 @@ private:
u8 boot1_hash[0x14]; // 0x100 u8 boot1_hash[0x14]; // 0x100
u8 common_key[0x10]; // 0x114 u8 common_key[0x10]; // 0x114
u32 ng_id; // 0x124 u32 ng_id; // 0x124
union { union
{
struct struct
{ {
u8 ng_priv[0x1e]; // 0x128 u8 ng_priv[0x1e]; // 0x128

9
Source/Core/VideoBackends/D3D/D3DState.h
View File

@ -18,13 +18,15 @@ struct ID3D11RasterizerState;
namespace DX11 namespace DX11
{ {
union RasterizerState { union RasterizerState
{
BitField<0, 2, D3D11_CULL_MODE> cull_mode; BitField<0, 2, D3D11_CULL_MODE> cull_mode;
u32 packed; u32 packed;
}; };
union BlendState { union BlendState
{
BitField<0, 1, u32> blend_enable; BitField<0, 1, u32> blend_enable;
BitField<1, 3, D3D11_BLEND_OP> blend_op; BitField<1, 3, D3D11_BLEND_OP> blend_op;
BitField<4, 4, u32> write_mask; BitField<4, 4, u32> write_mask;
@ -35,7 +37,8 @@ union BlendState {
u32 packed; u32 packed;
}; };
union SamplerState { union SamplerState
{
BitField<0, 3, u64> min_filter; BitField<0, 3, u64> min_filter;
BitField<3, 1, u64> mag_filter; BitField<3, 1, u64> mag_filter;
BitField<4, 8, u64> min_lod; BitField<4, 8, u64> min_lod;

3
Source/Core/VideoBackends/D3D/XFBEncoder.cpp
View File

@ -15,7 +15,8 @@
namespace DX11 namespace DX11
{ {
union XFBEncodeParams { union XFBEncodeParams
{
struct struct
{ {
FLOAT Width; // Width and height of encoded XFB in luma pixels FLOAT Width; // Width and height of encoded XFB in luma pixels

3
Source/Core/VideoBackends/D3D12/D3DQueuedCommandList.h
View File

@ -244,7 +244,8 @@ struct D3DQueueItem
{ {
D3DQueueItemType Type; D3DQueueItemType Type;
union { union
{
SetPipelineStateArguments SetPipelineState; SetPipelineStateArguments SetPipelineState;
SetRenderTargetsArguments SetRenderTargets; SetRenderTargetsArguments SetRenderTargets;
SetVertexBuffersArguments SetVertexBuffers; SetVertexBuffersArguments SetVertexBuffers;

9
Source/Core/VideoBackends/D3D12/D3DState.h
View File

@ -19,13 +19,15 @@ namespace DX12
{ {
class PipelineStateCacheInserter; class PipelineStateCacheInserter;
union RasterizerState { union RasterizerState
{
BitField<0, 2, D3D12_CULL_MODE> cull_mode; BitField<0, 2, D3D12_CULL_MODE> cull_mode;
u32 hex; u32 hex;
}; };
union BlendState { union BlendState
{
BitField<0, 1, u32> blend_enable; BitField<0, 1, u32> blend_enable;
BitField<1, 3, D3D12_BLEND_OP> blend_op; BitField<1, 3, D3D12_BLEND_OP> blend_op;
BitField<4, 4, u8> write_mask; BitField<4, 4, u8> write_mask;
@ -36,7 +38,8 @@ union BlendState {
u32 hex; u32 hex;
}; };
union SamplerState { union SamplerState
{
BitField<0, 3, u32> min_filter; BitField<0, 3, u32> min_filter;
BitField<3, 1, u32> mag_filter; BitField<3, 1, u32> mag_filter;
BitField<4, 8, u32> min_lod; BitField<4, 8, u32> min_lod;

3
Source/Core/VideoBackends/OGL/SamplerCache.h
View File

@ -28,7 +28,8 @@ public:
private: private:
struct Params struct Params
{ {
union { union
{
struct struct
{ {
TexMode0 tm0; TexMode0 tm0;

18
Source/Core/VideoBackends/Vulkan/Constants.h
View File

@ -117,7 +117,8 @@ constexpr u32 PUSH_CONSTANT_BUFFER_SIZE = 128;
constexpr u32 MINIMUM_DRAW_CALLS_PER_COMMAND_BUFFER_FOR_READBACK = 10; constexpr u32 MINIMUM_DRAW_CALLS_PER_COMMAND_BUFFER_FOR_READBACK = 10;
// Rasterization state info // Rasterization state info
union RasterizationState { union RasterizationState
{
BitField<0, 2, VkCullModeFlags> cull_mode; BitField<0, 2, VkCullModeFlags> cull_mode;
BitField<2, 7, VkSampleCountFlagBits> samples; BitField<2, 7, VkSampleCountFlagBits> samples;
BitField<9, 1, VkBool32> per_sample_shading; BitField<9, 1, VkBool32> per_sample_shading;
@ -127,7 +128,8 @@ union RasterizationState {
}; };
// Depth state info // Depth state info
union DepthStencilState { union DepthStencilState
{
BitField<0, 1, VkBool32> test_enable; BitField<0, 1, VkBool32> test_enable;
BitField<1, 1, VkBool32> write_enable; BitField<1, 1, VkBool32> write_enable;
BitField<2, 3, VkCompareOp> compare_op; BitField<2, 3, VkCompareOp> compare_op;
@ -136,10 +138,12 @@ union DepthStencilState {
}; };
// Blend state info // Blend state info
union BlendState { union BlendState
{
struct struct
{ {
union { union
{
BitField<0, 1, VkBool32> blend_enable; BitField<0, 1, VkBool32> blend_enable;
BitField<1, 3, VkBlendOp> blend_op; BitField<1, 3, VkBlendOp> blend_op;
BitField<4, 5, VkBlendFactor> src_blend; BitField<4, 5, VkBlendFactor> src_blend;
@ -150,7 +154,8 @@ union BlendState {
BitField<27, 4, VkColorComponentFlags> write_mask; BitField<27, 4, VkColorComponentFlags> write_mask;
u32 low_bits; u32 low_bits;
}; };
union { union
{
BitField<0, 1, VkBool32> logic_op_enable; BitField<0, 1, VkBool32> logic_op_enable;
BitField<1, 4, VkLogicOp> logic_op; BitField<1, 4, VkLogicOp> logic_op;
u32 high_bits; u32 high_bits;
@ -161,7 +166,8 @@ union BlendState {
}; };
// Sampler info // Sampler info
union SamplerState { union SamplerState
{
BitField<0, 1, VkFilter> min_filter; BitField<0, 1, VkFilter> min_filter;
BitField<1, 1, VkFilter> mag_filter; BitField<1, 1, VkFilter> mag_filter;
BitField<2, 1, VkSamplerMipmapMode> mipmap_mode; BitField<2, 1, VkSamplerMipmapMode> mipmap_mode;

3
Source/Core/VideoCommon/AsyncRequests.h
View File

@ -31,7 +31,8 @@ public:
} type; } type;
u64 time; u64 time;
union { union
{
struct struct
{ {
u16 x; u16 x;

126
Source/Core/VideoCommon/BPMemory.h
View File

@ -244,7 +244,8 @@ enum : u32
ITW_0 = 6 ITW_0 = 6
}; };
union IND_MTXA { union IND_MTXA
{
struct struct
{ {
s32 ma : 11; s32 ma : 11;
@ -255,7 +256,8 @@ union IND_MTXA {
u32 hex; u32 hex;
}; };
union IND_MTXB { union IND_MTXB
{
struct struct
{ {
s32 mc : 11; s32 mc : 11;
@ -266,7 +268,8 @@ union IND_MTXB {
u32 hex; u32 hex;
}; };
union IND_MTXC { union IND_MTXC
{
struct struct
{ {
s32 me : 11; s32 me : 11;
@ -284,7 +287,8 @@ struct IND_MTX
IND_MTXC col2; IND_MTXC col2;
}; };
union IND_IMASK { union IND_IMASK
{
struct struct
{ {
u32 mask : 24; u32 mask : 24;
@ -295,7 +299,8 @@ union IND_IMASK {
struct TevStageCombiner struct TevStageCombiner
{ {
union ColorCombiner { union ColorCombiner
{
struct // abc=8bit,d=10bit struct // abc=8bit,d=10bit
{ {
u32 d : 4; // TEVSELCC_X u32 d : 4; // TEVSELCC_X
@ -312,7 +317,8 @@ struct TevStageCombiner
}; };
u32 hex; u32 hex;
}; };
union AlphaCombiner { union AlphaCombiner
{
struct struct
{ {
u32 rswap : 2; u32 rswap : 2;
@ -345,7 +351,8 @@ struct TevStageCombiner
// GXSetTevIndirect(tevstage+1, indstage, 0, 3, realmat+4, 6, 6, 1, 0, 0) // GXSetTevIndirect(tevstage+1, indstage, 0, 3, realmat+4, 6, 6, 1, 0, 0)
// GXSetTevIndirect(tevstage+2, indstage, 0, 0, 0, 0, 0, 1, 0, 0) // GXSetTevIndirect(tevstage+2, indstage, 0, 0, 0, 0, 0, 1, 0, 0)
union TevStageIndirect { union TevStageIndirect
{
struct struct
{ {
u32 bt : 2; // Indirect tex stage ID u32 bt : 2; // Indirect tex stage ID
@ -372,7 +379,8 @@ union TevStageIndirect {
bool IsActive() { return bs != ITBA_OFF || mid != 0; } bool IsActive() { return bs != ITBA_OFF || mid != 0; }
}; };
union TwoTevStageOrders { union TwoTevStageOrders
{
struct struct
{ {
u32 texmap0 : 3; // Indirect tex stage texmap u32 texmap0 : 3; // Indirect tex stage texmap
@ -397,7 +405,8 @@ union TwoTevStageOrders {
int getColorChan(int i) const { return i ? colorchan1 : colorchan0; } int getColorChan(int i) const { return i ? colorchan1 : colorchan0; }
}; };
union TEXSCALE { union TEXSCALE
{
struct struct
{ {
u32 ss0 : 4; // Indirect tex stage 0, 2^(-ss0) u32 ss0 : 4; // Indirect tex stage 0, 2^(-ss0)
@ -410,7 +419,8 @@ union TEXSCALE {
u32 hex; u32 hex;
}; };
union RAS1_IREF { union RAS1_IREF
{
struct struct
{ {
u32 bi0 : 3; // Indirect tex stage 0 ntexmap u32 bi0 : 3; // Indirect tex stage 0 ntexmap
@ -431,7 +441,8 @@ union RAS1_IREF {
// Texture structs // Texture structs
union TexMode0 { union TexMode0
{
enum TextureFilter : u32 enum TextureFilter : u32
{ {
TEXF_NONE = 0, TEXF_NONE = 0,
@ -453,7 +464,8 @@ union TexMode0 {
}; };
u32 hex; u32 hex;
}; };
union TexMode1 { union TexMode1
{
struct struct
{ {
u32 min_lod : 8; u32 min_lod : 8;
@ -461,7 +473,8 @@ union TexMode1 {
}; };
u32 hex; u32 hex;
}; };
union TexImage0 { union TexImage0
{
struct struct
{ {
u32 width : 10; // Actually w-1 u32 width : 10; // Actually w-1
@ -470,7 +483,8 @@ union TexImage0 {
}; };
u32 hex; u32 hex;
}; };
union TexImage1 { union TexImage1
{
struct struct
{ {
u32 tmem_even : 15; // TMEM line index for even LODs u32 tmem_even : 15; // TMEM line index for even LODs
@ -482,7 +496,8 @@ union TexImage1 {
u32 hex; u32 hex;
}; };
union TexImage2 { union TexImage2
{
struct struct
{ {
u32 tmem_odd : 15; // tmem line index for odd LODs u32 tmem_odd : 15; // tmem line index for odd LODs
@ -492,14 +507,16 @@ union TexImage2 {
u32 hex; u32 hex;
}; };
union TexImage3 { union TexImage3
{
struct struct
{ {
u32 image_base : 24; // address in memory >> 5 (was 20 for GC) u32 image_base : 24; // address in memory >> 5 (was 20 for GC)
}; };
u32 hex; u32 hex;
}; };
union TexTLUT { union TexTLUT
{
struct struct
{ {
u32 tmem_offset : 10; u32 tmem_offset : 10;
@ -508,7 +525,8 @@ union TexTLUT {
u32 hex; u32 hex;
}; };
union ZTex1 { union ZTex1
{
struct struct
{ {
u32 bias : 24; u32 bias : 24;
@ -516,7 +534,8 @@ union ZTex1 {
u32 hex; u32 hex;
}; };
union ZTex2 { union ZTex2
{
struct struct
{ {
u32 type : 2; // TEV_Z_TYPE_X u32 type : 2; // TEV_Z_TYPE_X
@ -539,7 +558,8 @@ struct FourTexUnits
// Geometry/other structs // Geometry/other structs
union GenMode { union GenMode
{
enum CullMode : u32 enum CullMode : u32
{ {
CULL_NONE = 0, CULL_NONE = 0,
@ -561,7 +581,8 @@ union GenMode {
u32 hex; u32 hex;
}; };
union LPSize { union LPSize
{
struct struct
{ {
u32 linesize : 8; // in 1/6th pixels u32 linesize : 8; // in 1/6th pixels
@ -574,7 +595,8 @@ union LPSize {
u32 hex; u32 hex;
}; };
union X12Y12 { union X12Y12
{
struct struct
{ {
u32 y : 12; u32 y : 12;
@ -582,7 +604,8 @@ union X12Y12 {
}; };
u32 hex; u32 hex;
}; };
union X10Y10 { union X10Y10
{
struct struct
{ {
u32 x : 10; u32 x : 10;
@ -593,7 +616,8 @@ union X10Y10 {
// Framebuffer/pixel stuff (incl fog) // Framebuffer/pixel stuff (incl fog)
union BlendMode { union BlendMode
{
enum BlendFactor : u32 enum BlendFactor : u32
{ {
ZERO = 0, ZERO = 0,
@ -641,7 +665,8 @@ union BlendMode {
u32 hex; u32 hex;
}; };
union FogParam0 { union FogParam0
{
struct struct
{ {
u32 mantissa : 11; u32 mantissa : 11;
@ -651,7 +676,8 @@ union FogParam0 {
float GetA() float GetA()
{ {
union { union
{
u32 i; u32 i;
float f; float f;
} dummy; } dummy;
@ -663,7 +689,8 @@ union FogParam0 {
u32 hex; u32 hex;
}; };
union FogParam3 { union FogParam3
{
struct struct
{ {
u32 c_mant : 11; u32 c_mant : 11;
@ -676,7 +703,8 @@ union FogParam3 {
// amount to subtract from eyespacez after range adjustment // amount to subtract from eyespacez after range adjustment
float GetC() float GetC()
{ {
union { union
{
u32 i; u32 i;
float f; float f;
} dummy; } dummy;
@ -688,7 +716,8 @@ union FogParam3 {
u32 hex; u32 hex;
}; };
union FogRangeKElement { union FogRangeKElement
{
struct struct
{ {
u32 HI : 12; u32 HI : 12;
@ -703,7 +732,8 @@ union FogRangeKElement {
struct FogRangeParams struct FogRangeParams
{ {
union RangeBase { union RangeBase
{
struct struct
{ {
u32 Center : 10; // viewport center + 342 u32 Center : 10; // viewport center + 342
@ -724,7 +754,8 @@ struct FogParams
u32 b_shift; // b's exp + 1? u32 b_shift; // b's exp + 1?
FogParam3 c_proj_fsel; FogParam3 c_proj_fsel;
union FogColor { union FogColor
{
struct struct
{ {
u32 b : 8; u32 b : 8;
@ -737,7 +768,8 @@ struct FogParams
FogColor color; // 0:b 8:g 16:r - nice! FogColor color; // 0:b 8:g 16:r - nice!
}; };
union ZMode { union ZMode
{
enum CompareMode : u32 enum CompareMode : u32
{ {
NEVER = 0, NEVER = 0,
@ -757,7 +789,8 @@ union ZMode {
u32 hex; u32 hex;
}; };
union ConstantAlpha { union ConstantAlpha
{
struct struct
{ {
u32 alpha : 8; u32 alpha : 8;
@ -766,7 +799,8 @@ union ConstantAlpha {
u32 hex; u32 hex;
}; };
union FieldMode { union FieldMode
{
struct struct
{ {
u32 texLOD : 1; // adjust vert tex LOD computation to account for interlacing u32 texLOD : 1; // adjust vert tex LOD computation to account for interlacing
@ -774,7 +808,8 @@ union FieldMode {
u32 hex; u32 hex;
}; };
union FieldMask { union FieldMask
{
struct struct
{ {
// If bit is not set, do not write field to EFB // If bit is not set, do not write field to EFB
@ -784,7 +819,8 @@ union FieldMask {
u32 hex; u32 hex;
}; };
union PEControl { union PEControl
{
enum PixelFormat : u32 enum PixelFormat : u32
{ {
RGB8_Z24 = 0, RGB8_Z24 = 0,
@ -821,7 +857,8 @@ union PEControl {
// Texture coordinate stuff // Texture coordinate stuff
union TCInfo { union TCInfo
{
struct struct
{ {
u32 scale_minus_1 : 16; u32 scale_minus_1 : 16;
@ -839,7 +876,8 @@ struct TCoordInfo
TCInfo t; TCInfo t;
}; };
union TevReg { union TevReg
{
u64 hex; u64 hex;
// Access to individual registers // Access to individual registers
@ -861,7 +899,8 @@ union TevReg {
BitField<55, 1, u64> type_bg; BitField<55, 1, u64> type_bg;
}; };
union TevKSel { union TevKSel
{
struct struct
{ {
u32 swap1 : 2; u32 swap1 : 2;
@ -877,7 +916,8 @@ union TevKSel {
int getKA(int i) { return i ? kasel1 : kasel0; } int getKA(int i) { return i ? kasel1 : kasel0; }
}; };
union AlphaTest { union AlphaTest
{
enum CompareMode : u32 enum CompareMode : u32
{ {
NEVER = 0, NEVER = 0,
@ -952,7 +992,8 @@ union AlphaTest {
} }
}; };
union UPE_Copy { union UPE_Copy
{
u32 Hex; u32 Hex;
BitField<0, 1, u32> clamp0; // if set clamp top BitField<0, 1, u32> clamp0; // if set clamp top
@ -975,7 +1016,8 @@ union UPE_Copy {
u32 tp_realFormat() { return target_pixel_format / 2 + (target_pixel_format & 1) * 8; } u32 tp_realFormat() { return target_pixel_format / 2 + (target_pixel_format & 1) * 8; }
}; };
union BPU_PreloadTileInfo { union BPU_PreloadTileInfo
{
u32 hex; u32 hex;
struct struct
{ {

18
Source/Core/VideoCommon/CPMemory.h
View File

@ -48,7 +48,8 @@ enum
}; };
#pragma pack(4) #pragma pack(4)
union TVtxDesc { union TVtxDesc
{
u64 Hex; u64 Hex;
struct struct
{ {
@ -92,7 +93,8 @@ union TVtxDesc {
u32 GetVertexArrayStatus(int idx) { return (Hex >> (9 + idx * 2)) & 0x3; } u32 GetVertexArrayStatus(int idx) { return (Hex >> (9 + idx * 2)) & 0x3; }
}; };
union UVAT_group0 { union UVAT_group0
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -119,7 +121,8 @@ union UVAT_group0 {
}; };
}; };
union UVAT_group1 { union UVAT_group1
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -143,7 +146,8 @@ union UVAT_group1 {
}; };
}; };
union UVAT_group2 { union UVAT_group2
{
u32 Hex; u32 Hex;
struct struct
{ {
@ -191,7 +195,8 @@ struct TVtxAttr
}; };
// Matrix indices // Matrix indices
union TMatrixIndexA { union TMatrixIndexA
{
struct struct
{ {
u32 PosNormalMtxIdx : 6; u32 PosNormalMtxIdx : 6;
@ -207,7 +212,8 @@ union TMatrixIndexA {
}; };
}; };
union TMatrixIndexB { union TMatrixIndexB
{
struct struct
{ {
u32 Tex4MtxIdx : 6; u32 Tex4MtxIdx : 6;

9
Source/Core/VideoCommon/CommandProcessor.h
View File

@ -71,7 +71,8 @@ enum
}; };
// Fifo Status Register // Fifo Status Register
union UCPStatusReg { union UCPStatusReg
{
struct struct
{ {
u16 OverflowHiWatermark : 1; u16 OverflowHiWatermark : 1;
@ -87,7 +88,8 @@ union UCPStatusReg {
}; };
// Fifo Control Register // Fifo Control Register
union UCPCtrlReg { union UCPCtrlReg
{
struct struct
{ {
u16 GPReadEnable : 1; u16 GPReadEnable : 1;
@ -104,7 +106,8 @@ union UCPCtrlReg {
}; };
// Fifo Clear Register // Fifo Clear Register
union UCPClearReg { union UCPClearReg
{
struct struct
{ {
u16 ClearFifoOverflow : 1; u16 ClearFifoOverflow : 1;

15
Source/Core/VideoCommon/PixelEngine.cpp
View File

@ -21,7 +21,8 @@
namespace PixelEngine namespace PixelEngine
{ {
union UPEZConfReg { union UPEZConfReg
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -32,7 +33,8 @@ union UPEZConfReg {
}; };
}; };
union UPEAlphaConfReg { union UPEAlphaConfReg
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -48,7 +50,8 @@ union UPEAlphaConfReg {
}; };
}; };
union UPEDstAlphaConfReg { union UPEDstAlphaConfReg
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -58,7 +61,8 @@ union UPEDstAlphaConfReg {
}; };
}; };
union UPEAlphaModeConfReg { union UPEAlphaModeConfReg
{
u16 Hex; u16 Hex;
struct struct
{ {
@ -68,7 +72,8 @@ union UPEAlphaModeConfReg {
}; };
// fifo Control Register // fifo Control Register
union UPECtrlReg { union UPECtrlReg
{
struct struct
{ {
u16 PETokenEnable : 1; u16 PETokenEnable : 1;

3
Source/Core/VideoCommon/PixelEngine.h
View File

@ -46,7 +46,8 @@ enum
namespace PixelEngine namespace PixelEngine
{ {
// ReadMode specifies the returned alpha channel for EFB peeks // ReadMode specifies the returned alpha channel for EFB peeks
union UPEAlphaReadReg { union UPEAlphaReadReg
{
u16 Hex; u16 Hex;
struct struct
{ {

3
Source/Core/VideoCommon/ShaderGenCommon.h
View File

@ -104,7 +104,8 @@ public:
const u8* GetUidDataRaw() const { return &values[0]; } const u8* GetUidDataRaw() const { return &values[0]; }
size_t GetUidDataSize() const { return sizeof(values); } size_t GetUidDataSize() const { return sizeof(values); }
private: private:
union { union
{
uid_data data; uid_data data;
u8 values[sizeof(uid_data)]; u8 values[sizeof(uid_data)];
}; };

24
Source/Core/VideoCommon/XFMemory.h
View File

@ -130,7 +130,8 @@ enum
XFMEM_SETPOSMTXINFO = 0x1050, XFMEM_SETPOSMTXINFO = 0x1050,
}; };
union LitChannel { union LitChannel
{
struct struct
{ {
u32 matsource : 1; u32 matsource : 1;
@ -158,7 +159,8 @@ union LitChannel {
} }
}; };
union INVTXSPEC { union INVTXSPEC
{
struct struct
{ {
u32 numcolors : 2; u32 numcolors : 2;
@ -169,7 +171,8 @@ union INVTXSPEC {
u32 hex; u32 hex;
}; };
union TexMtxInfo { union TexMtxInfo
{
struct struct
{ {
u32 unknown : 1; u32 unknown : 1;
@ -184,7 +187,8 @@ union TexMtxInfo {
u32 hex; u32 hex;
}; };
union PostMtxInfo { union PostMtxInfo
{
struct struct
{ {
u32 index : 6; // base row of dual transform matrix u32 index : 6; // base row of dual transform matrix
@ -194,7 +198,8 @@ union PostMtxInfo {
u32 hex; u32 hex;
}; };
union NumColorChannel { union NumColorChannel
{
struct struct
{ {
u32 numColorChans : 2; u32 numColorChans : 2;
@ -202,7 +207,8 @@ union NumColorChannel {
u32 hex; u32 hex;
}; };
union NumTexGen { union NumTexGen
{
struct struct
{ {
u32 numTexGens : 4; u32 numTexGens : 4;
@ -210,7 +216,8 @@ union NumTexGen {
u32 hex; u32 hex;
}; };
union DualTexInfo { union DualTexInfo
{
struct struct
{ {
u32 enabled : 1; u32 enabled : 1;
@ -225,7 +232,8 @@ struct Light
float cosatt[3]; // cos attenuation float cosatt[3]; // cos attenuation
float distatt[3]; // dist attenuation float distatt[3]; // dist attenuation
union { union
{
struct struct
{ {
float dpos[3]; float dpos[3];

3
Source/UnitTests/Common/BitFieldTest.cpp
View File

@ -7,7 +7,8 @@
#include "Common/BitField.h" #include "Common/BitField.h"
#include "Common/CommonTypes.h" #include "Common/CommonTypes.h"
union TestUnion { union TestUnion
{
u64 hex; u64 hex;
BitField<0, 64, u64> full_u64; // spans whole storage BitField<0, 64, u64> full_u64; // spans whole storage