JitArm64: Fix unsigned/signed arg/param mismatch
The result of calls to PPCSTATE_OFF_PS0/1 were being cast to u32 and passed to functions expecting s32 parameters. This changes the casts to s32 instead. One location was missing a cast and generated a warning with VS which is now fixed.
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@ -457,7 +457,8 @@ ARM64Reg Arm64FPRCache::R(size_t preg, RegType type)
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// Load the high 64bits from the file and insert them in to the high 64bits of the host
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// Load the high 64bits from the file and insert them in to the high 64bits of the host
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// register
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// register
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const ARM64Reg tmp_reg = GetReg();
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const ARM64Reg tmp_reg = GetReg();
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m_float_emit->LDR(64, IndexType::Unsigned, tmp_reg, PPC_REG, u32(PPCSTATE_OFF_PS1(preg)));
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m_float_emit->LDR(64, IndexType::Unsigned, tmp_reg, PPC_REG,
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static_cast<s32>(PPCSTATE_OFF_PS1(preg)));
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m_float_emit->INS(64, host_reg, 1, tmp_reg, 0);
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m_float_emit->INS(64, host_reg, 1, tmp_reg, 0);
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UnlockRegister(tmp_reg);
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UnlockRegister(tmp_reg);
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@ -511,7 +512,7 @@ ARM64Reg Arm64FPRCache::R(size_t preg, RegType type)
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}
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}
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reg.SetDirty(false);
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reg.SetDirty(false);
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m_float_emit->LDR(load_size, IndexType::Unsigned, host_reg, PPC_REG,
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m_float_emit->LDR(load_size, IndexType::Unsigned, host_reg, PPC_REG,
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u32(PPCSTATE_OFF_PS0(preg)));
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static_cast<s32>(PPCSTATE_OFF_PS0(preg)));
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return host_reg;
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return host_reg;
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}
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}
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default:
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default:
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@ -559,7 +560,8 @@ ARM64Reg Arm64FPRCache::RW(size_t preg, RegType type)
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// We are doing a full 128bit store because it takes 2 cycles on a Cortex-A57 to do a 128bit
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// We are doing a full 128bit store because it takes 2 cycles on a Cortex-A57 to do a 128bit
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// store.
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// store.
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// It would take longer to do an insert to a temporary and a 64bit store than to just do this.
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// It would take longer to do an insert to a temporary and a 64bit store than to just do this.
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m_float_emit->STR(128, IndexType::Unsigned, flush_reg, PPC_REG, u32(PPCSTATE_OFF_PS0(preg)));
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m_float_emit->STR(128, IndexType::Unsigned, flush_reg, PPC_REG,
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static_cast<s32>(PPCSTATE_OFF_PS0(preg)));
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break;
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break;
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case RegType::DuplicatedSingle:
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case RegType::DuplicatedSingle:
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flush_reg = GetReg();
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flush_reg = GetReg();
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@ -567,7 +569,8 @@ ARM64Reg Arm64FPRCache::RW(size_t preg, RegType type)
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[[fallthrough]];
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[[fallthrough]];
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case RegType::Duplicated:
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case RegType::Duplicated:
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// Store PSR1 (which is equal to PSR0) in memory.
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// Store PSR1 (which is equal to PSR0) in memory.
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m_float_emit->STR(64, IndexType::Unsigned, flush_reg, PPC_REG, u32(PPCSTATE_OFF_PS1(preg)));
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m_float_emit->STR(64, IndexType::Unsigned, flush_reg, PPC_REG,
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static_cast<s32>(PPCSTATE_OFF_PS1(preg)));
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break;
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break;
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default:
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default:
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// All other types doesn't store anything in PSR1.
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// All other types doesn't store anything in PSR1.
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@ -695,7 +698,7 @@ void Arm64FPRCache::FlushRegister(size_t preg, bool maintain_state)
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if (dirty)
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if (dirty)
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{
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{
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m_float_emit->STR(store_size, IndexType::Unsigned, host_reg, PPC_REG,
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m_float_emit->STR(store_size, IndexType::Unsigned, host_reg, PPC_REG,
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u32(PPCSTATE_OFF_PS0(preg)));
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static_cast<s32>(PPCSTATE_OFF_PS0(preg)));
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}
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}
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if (!maintain_state)
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if (!maintain_state)
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@ -711,12 +714,14 @@ void Arm64FPRCache::FlushRegister(size_t preg, bool maintain_state)
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if (PPCSTATE_OFF_PS0(preg) <= 504)
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if (PPCSTATE_OFF_PS0(preg) <= 504)
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{
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{
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m_float_emit->STP(64, IndexType::Signed, host_reg, host_reg, PPC_REG,
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m_float_emit->STP(64, IndexType::Signed, host_reg, host_reg, PPC_REG,
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PPCSTATE_OFF_PS0(preg));
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static_cast<s32>(PPCSTATE_OFF_PS0(preg)));
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}
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}
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else
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else
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{
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{
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m_float_emit->STR(64, IndexType::Unsigned, host_reg, PPC_REG, u32(PPCSTATE_OFF_PS0(preg)));
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m_float_emit->STR(64, IndexType::Unsigned, host_reg, PPC_REG,
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m_float_emit->STR(64, IndexType::Unsigned, host_reg, PPC_REG, u32(PPCSTATE_OFF_PS1(preg)));
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static_cast<s32>(PPCSTATE_OFF_PS0(preg)));
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m_float_emit->STR(64, IndexType::Unsigned, host_reg, PPC_REG,
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static_cast<s32>(PPCSTATE_OFF_PS1(preg)));
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}
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}
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}
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}
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