JitArm64: Deduplicate a discard assert

FlushRegisters and FlushCRRegisters both call FlushRegister, and
FlushRegister is already branching based on IsInHostRegister and IsImm,
so this assert fits better in FlushRegister.
This commit is contained in:
JosJuice 2024-10-23 21:08:10 +02:00
parent bf8c1fa592
commit 46c298d96a
1 changed files with 4 additions and 9 deletions

View File

@ -246,6 +246,10 @@ void Arm64GPRCache::FlushRegister(size_t index, FlushMode mode, ARM64Reg tmp_reg
if (mode == FlushMode::All) if (mode == FlushMode::All)
reg.Flush(); reg.Flush();
} }
else
{
ASSERT_MSG(DYNA_REC, reg.IsInPPCState(), "Attempted to flush discarded register");
}
} }
void Arm64GPRCache::FlushRegisters(BitSet32 regs, FlushMode mode, ARM64Reg tmp_reg) void Arm64GPRCache::FlushRegisters(BitSet32 regs, FlushMode mode, ARM64Reg tmp_reg)
@ -253,9 +257,6 @@ void Arm64GPRCache::FlushRegisters(BitSet32 regs, FlushMode mode, ARM64Reg tmp_r
for (auto iter = regs.begin(); iter != regs.end(); ++iter) for (auto iter = regs.begin(); iter != regs.end(); ++iter)
{ {
const int i = *iter; const int i = *iter;
OpArg& reg = m_guest_registers[GUEST_GPR_OFFSET + i];
ASSERT_MSG(DYNA_REC, reg.IsInPPCState() || reg.IsInHostRegister() || IsImm(i),
"Attempted to flush discarded register");
if (i + 1 < int(GUEST_GPR_COUNT) && regs[i + 1]) if (i + 1 < int(GUEST_GPR_COUNT) && regs[i + 1])
{ {
@ -299,14 +300,8 @@ void Arm64GPRCache::FlushRegisters(BitSet32 regs, FlushMode mode, ARM64Reg tmp_r
void Arm64GPRCache::FlushCRRegisters(BitSet8 regs, FlushMode mode, ARM64Reg tmp_reg) void Arm64GPRCache::FlushCRRegisters(BitSet8 regs, FlushMode mode, ARM64Reg tmp_reg)
{ {
for (int i : regs) for (int i : regs)
{
OpArg& reg = m_guest_registers[GUEST_CR_OFFSET + i];
ASSERT_MSG(DYNA_REC, reg.IsInPPCState() || reg.IsInHostRegister(),
"Attempted to flush discarded register");
FlushRegister(GUEST_CR_OFFSET + i, mode, tmp_reg); FlushRegister(GUEST_CR_OFFSET + i, mode, tmp_reg);
} }
}
void Arm64GPRCache::DiscardCRRegisters(BitSet8 regs) void Arm64GPRCache::DiscardCRRegisters(BitSet8 regs)
{ {