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Expose the JIT quantize and dequantize arrays to all the JITs. 

Removes the ARMv7 arrays that were being used, and lets it use the common one instead.
This commit is contained in:
Ryan Houdek 2015-01-18 16:20:26 -06:00
parent 37a770bb9f
commit 44405e2ec2
5 changed files with 9 additions and 47 deletions
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2
Source/Core/Core/CMakeLists.txt
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@ -165,6 +165,7 @@ set(SRCS ActionReplay.cpp
PowerPC/Interpreter/Interpreter_Paired.cpp PowerPC/Interpreter/Interpreter_Paired.cpp
PowerPC/Interpreter/Interpreter_SystemRegisters.cpp PowerPC/Interpreter/Interpreter_SystemRegisters.cpp
PowerPC/Interpreter/Interpreter_Tables.cpp PowerPC/Interpreter/Interpreter_Tables.cpp
PowerPC/JitCommon/JitAsmCommon.cpp
PowerPC/JitCommon/JitBase.cpp PowerPC/JitCommon/JitBase.cpp
PowerPC/JitCommon/JitCache.cpp PowerPC/JitCommon/JitCache.cpp
PowerPC/JitILCommon/IR.cpp PowerPC/JitILCommon/IR.cpp
@ -195,7 +196,6 @@ if(_M_X86)
PowerPC/Jit64/Jit_Paired.cpp PowerPC/Jit64/Jit_Paired.cpp
PowerPC/Jit64/JitRegCache.cpp PowerPC/Jit64/JitRegCache.cpp
PowerPC/Jit64/Jit_SystemRegisters.cpp PowerPC/Jit64/Jit_SystemRegisters.cpp
PowerPC/JitCommon/JitAsmCommon.cpp
PowerPC/JitCommon/JitBackpatch.cpp PowerPC/JitCommon/JitBackpatch.cpp
PowerPC/JitCommon/Jit_Util.cpp PowerPC/JitCommon/Jit_Util.cpp
PowerPC/JitCommon/TrampolineCache.cpp) PowerPC/JitCommon/TrampolineCache.cpp)

8
Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStorePaired.cpp
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@ -33,7 +33,7 @@ void JitArm::psq_l(UGeckoInstruction inst)
UBFX(R12, R11, 16, 3); // Type UBFX(R12, R11, 16, 3); // Type
LSL(R12, R12, 2); LSL(R12, R12, 2);
UBFX(R11, R11, 24, 6); // Scale UBFX(R11, R11, 24, 6); // Scale
LSL(R11, R11, 2); LSL(R11, R11, 3);
Operand2 off; Operand2 off;
if (TryMakeOperand2(offset, off)) if (TryMakeOperand2(offset, off))
@ -84,7 +84,7 @@ void JitArm::psq_lx(UGeckoInstruction inst)
UBFX(R12, R11, 16, 3); // Type UBFX(R12, R11, 16, 3); // Type
LSL(R12, R12, 2); LSL(R12, R12, 2);
UBFX(R11, R11, 24, 6); // Scale UBFX(R11, R11, 24, 6); // Scale
LSL(R11, R11, 2); LSL(R11, R11, 3);
if (inst.RA || update) // Always uses the register on update if (inst.RA || update) // Always uses the register on update
{ {
@ -136,7 +136,7 @@ void JitArm::psq_st(UGeckoInstruction inst)
UBFX(R12, R11, 0, 3); // Type UBFX(R12, R11, 0, 3); // Type
LSL(R12, R12, 2); LSL(R12, R12, 2);
UBFX(R11, R11, 8, 6); // Scale UBFX(R11, R11, 8, 6); // Scale
LSL(R11, R11, 2); LSL(R11, R11, 3);
Operand2 off; Operand2 off;
if (TryMakeOperand2(offset, off)) if (TryMakeOperand2(offset, off))
@ -187,7 +187,7 @@ void JitArm::psq_stx(UGeckoInstruction inst)
UBFX(R12, R11, 0, 3); // Type UBFX(R12, R11, 0, 3); // Type
LSL(R12, R12, 2); LSL(R12, R12, 2);
UBFX(R11, R11, 8, 6); // Scale UBFX(R11, R11, 8, 6); // Scale
LSL(R11, R11, 2); LSL(R11, R11, 3);
if (inst.RA || update) // Always uses the register on update if (inst.RA || update) // Always uses the register on update
{ {

40
Source/Core/Core/PowerPC/JitArm32/JitAsm.cpp
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@ -27,46 +27,6 @@ using namespace ArmGen;
JitArmAsmRoutineManager asm_routines; JitArmAsmRoutineManager asm_routines;
static const float GC_ALIGNED16(m_quantizeTableS[]) =
{
(1 << 0), (1 << 1), (1 << 2), (1 << 3),
(1 << 4), (1 << 5), (1 << 6), (1 << 7),
(1 << 8), (1 << 9), (1 << 10), (1 << 11),
(1 << 12), (1 << 13), (1 << 14), (1 << 15),
(1 << 16), (1 << 17), (1 << 18), (1 << 19),
(1 << 20), (1 << 21), (1 << 22), (1 << 23),
(1 << 24), (1 << 25), (1 << 26), (1 << 27),
(1 << 28), (1 << 29), (1 << 30), (1 << 31),
1.0 / (1ULL << 32), 1.0 / (1 << 31), 1.0 / (1 << 30), 1.0 / (1 << 29),
1.0 / (1 << 28), 1.0 / (1 << 27), 1.0 / (1 << 26), 1.0 / (1 << 25),
1.0 / (1 << 24), 1.0 / (1 << 23), 1.0 / (1 << 22), 1.0 / (1 << 21),
1.0 / (1 << 20), 1.0 / (1 << 19), 1.0 / (1 << 18), 1.0 / (1 << 17),
1.0 / (1 << 16), 1.0 / (1 << 15), 1.0 / (1 << 14), 1.0 / (1 << 13),
1.0 / (1 << 12), 1.0 / (1 << 11), 1.0 / (1 << 10), 1.0 / (1 << 9),
1.0 / (1 << 8), 1.0 / (1 << 7), 1.0 / (1 << 6), 1.0 / (1 << 5),
1.0 / (1 << 4), 1.0 / (1 << 3), 1.0 / (1 << 2), 1.0 / (1 << 1),
};
static const float GC_ALIGNED16(m_dequantizeTableS[]) =
{
1.0 / (1 << 0), 1.0 / (1 << 1), 1.0 / (1 << 2), 1.0 / (1 << 3),
1.0 / (1 << 4), 1.0 / (1 << 5), 1.0 / (1 << 6), 1.0 / (1 << 7),
1.0 / (1 << 8), 1.0 / (1 << 9), 1.0 / (1 << 10), 1.0 / (1 << 11),
1.0 / (1 << 12), 1.0 / (1 << 13), 1.0 / (1 << 14), 1.0 / (1 << 15),
1.0 / (1 << 16), 1.0 / (1 << 17), 1.0 / (1 << 18), 1.0 / (1 << 19),
1.0 / (1 << 20), 1.0 / (1 << 21), 1.0 / (1 << 22), 1.0 / (1 << 23),
1.0 / (1 << 24), 1.0 / (1 << 25), 1.0 / (1 << 26), 1.0 / (1 << 27),
1.0 / (1 << 28), 1.0 / (1 << 29), 1.0 / (1 << 30), 1.0 / (1 << 31),
(1ULL << 32), (1 << 31), (1 << 30), (1 << 29),
(1 << 28), (1 << 27), (1 << 26), (1 << 25),
(1 << 24), (1 << 23), (1 << 22), (1 << 21),
(1 << 20), (1 << 19), (1 << 18), (1 << 17),
(1 << 16), (1 << 15), (1 << 14), (1 << 13),
(1 << 12), (1 << 11), (1 << 10), (1 << 9),
(1 << 8), (1 << 7), (1 << 6), (1 << 5),
(1 << 4), (1 << 3), (1 << 2), (1 << 1),
};
static void WriteDual32(u32 value1, u32 value2, u32 address) static void WriteDual32(u32 value1, u32 value2, u32 address)
{ {
Memory::Write_U32(value1, address); Memory::Write_U32(value1, address);

4
Source/Core/Core/PowerPC/JitCommon/JitAsmCommon.cpp
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@ -194,7 +194,7 @@ void CommonAsmRoutines::GenMfcr()
const u8 GC_ALIGNED16(pbswapShuffle1x4[16]) = { 3, 2, 1, 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; const u8 GC_ALIGNED16(pbswapShuffle1x4[16]) = { 3, 2, 1, 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
const u8 GC_ALIGNED16(pbswapShuffle2x4[16]) = { 3, 2, 1, 0, 7, 6, 5, 4, 8, 9, 10, 11, 12, 13, 14, 15 }; const u8 GC_ALIGNED16(pbswapShuffle2x4[16]) = { 3, 2, 1, 0, 7, 6, 5, 4, 8, 9, 10, 11, 12, 13, 14, 15 };
static const float GC_ALIGNED16(m_quantizeTableS[]) = const float GC_ALIGNED16(m_quantizeTableS[]) =
{ {
(1ULL << 0), (1ULL << 0), (1ULL << 1), (1ULL << 1), (1ULL << 2), (1ULL << 2), (1ULL << 3), (1ULL << 3), (1ULL << 0), (1ULL << 0), (1ULL << 1), (1ULL << 1), (1ULL << 2), (1ULL << 2), (1ULL << 3), (1ULL << 3),
(1ULL << 4), (1ULL << 4), (1ULL << 5), (1ULL << 5), (1ULL << 6), (1ULL << 6), (1ULL << 7), (1ULL << 7), (1ULL << 4), (1ULL << 4), (1ULL << 5), (1ULL << 5), (1ULL << 6), (1ULL << 6), (1ULL << 7), (1ULL << 7),
@ -222,7 +222,7 @@ static const float GC_ALIGNED16(m_quantizeTableS[]) =
1.0 / (1ULL << 2), 1.0 / (1ULL << 2), 1.0 / (1ULL << 1), 1.0 / (1ULL << 1), 1.0 / (1ULL << 2), 1.0 / (1ULL << 2), 1.0 / (1ULL << 1), 1.0 / (1ULL << 1),
}; };
static const float GC_ALIGNED16(m_dequantizeTableS[]) = const float GC_ALIGNED16(m_dequantizeTableS[]) =
{ {
1.0 / (1ULL << 0), 1.0 / (1ULL << 0), 1.0 / (1ULL << 1), 1.0 / (1ULL << 1), 1.0 / (1ULL << 0), 1.0 / (1ULL << 0), 1.0 / (1ULL << 1), 1.0 / (1ULL << 1),
1.0 / (1ULL << 2), 1.0 / (1ULL << 2), 1.0 / (1ULL << 3), 1.0 / (1ULL << 3), 1.0 / (1ULL << 2), 1.0 / (1ULL << 2), 1.0 / (1ULL << 3), 1.0 / (1ULL << 3),

2
Source/Core/Core/PowerPC/JitCommon/JitAsmCommon.h
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@ -9,6 +9,8 @@
extern const u8 GC_ALIGNED16(pbswapShuffle1x4[16]); extern const u8 GC_ALIGNED16(pbswapShuffle1x4[16]);
extern const u8 GC_ALIGNED16(pbswapShuffle2x4[16]); extern const u8 GC_ALIGNED16(pbswapShuffle2x4[16]);
extern const float GC_ALIGNED16(m_one[]); extern const float GC_ALIGNED16(m_one[]);
extern const float GC_ALIGNED16(m_quantizeTableS[]);
extern const float GC_ALIGNED16(m_dequantizeTableS[]);
class CommonAsmRoutinesBase class CommonAsmRoutinesBase
{ {