Jit64: Add a switch for easier fallback to the C++ dispatcher.
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@ -92,19 +92,10 @@ void Jit64AsmRoutineManager::Generate()
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dispatcherNoCheck = GetCodePtr();
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// Switch to the correct memory base, in case MSR.DR has changed.
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// TODO: Is there a more efficient place to put this? We don't
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// need to do this for indirect jumps, just exceptions etc.
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TEST(32, PPCSTATE(msr), Imm32(1 << (31 - 27)));
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FixupBranch physmem = J_CC(CC_NZ);
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MOV(64, R(RMEM), ImmPtr(Memory::physical_base));
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FixupBranch membaseend = J();
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SetJumpTarget(physmem);
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MOV(64, R(RMEM), ImmPtr(Memory::logical_base));
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SetJumpTarget(membaseend);
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// The following is a translation of JitBaseBlockCache::Dispatch into assembly.
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const bool assembly_dispatcher = true;
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if (assembly_dispatcher)
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{
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// Fast block number lookup.
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// ((PC >> 2) & mask) * sizeof(JitBlock*) = (PC & (mask << 2)) * 2
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MOV(32, R(RSCRATCH), PPCSTATE(pc));
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@ -132,14 +123,22 @@ void Jit64AsmRoutineManager::Generate()
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OR(64, R(RSCRATCH2), R(RSCRATCH_EXTRA));
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CMP(64, R(RSCRATCH2), MDisp(RSCRATCH, static_cast<s32>(offsetof(JitBlock, effectiveAddress))));
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FixupBranch state_mismatch = J_CC(CC_NE);
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// Success; branch to the block we found.
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// Switch to the correct memory base, in case MSR.DR has changed.
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TEST(32, PPCSTATE(msr), Imm32(1 << (31 - 27)));
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FixupBranch physmem = J_CC(CC_Z);
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MOV(64, R(RMEM), ImmPtr(Memory::logical_base));
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JMPptr(MDisp(RSCRATCH, static_cast<s32>(offsetof(JitBlock, normalEntry))));
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SetJumpTarget(physmem);
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MOV(64, R(RMEM), ImmPtr(Memory::physical_base));
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JMPptr(MDisp(RSCRATCH, static_cast<s32>(offsetof(JitBlock, normalEntry))));
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SetJumpTarget(not_found);
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SetJumpTarget(state_mismatch);
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// Failure; call into the block cache to update the state, then try again.
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// (We need to loop because Jit() might not actually generate a block
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// if we hit an ISI.)
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// Failure, fallback to the C++ dispatcher for calling the JIT.
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}
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// We reset the stack because Jit might clear the code cache.
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// Also if we are in the middle of disabling BLR optimization on windows
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@ -151,8 +150,15 @@ void Jit64AsmRoutineManager::Generate()
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ABI_PushRegistersAndAdjustStack({}, 0);
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ABI_CallFunction(JitBase::Dispatch);
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ABI_PopRegistersAndAdjustStack({}, 0);
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// JMPptr(R(ABI_RETURN));
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JMP(dispatcherNoCheck, true);
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// Switch to the correct memory base, in case MSR.DR has changed.
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TEST(32, PPCSTATE(msr), Imm32(1 << (31 - 27)));
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FixupBranch physmem = J_CC(CC_Z);
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MOV(64, R(RMEM), ImmPtr(Memory::logical_base));
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JMPptr(R(ABI_RETURN));
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SetJumpTarget(physmem);
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MOV(64, R(RMEM), ImmPtr(Memory::physical_base));
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JMPptr(R(ABI_RETURN));
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SetJumpTarget(bail);
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doTiming = GetCodePtr();
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