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DSPIntExtOps: Correct casing of functions 

Corrects several functions to conform to our coding style.
This commit is contained in:
Lioncash 2018-06-21 12:53:19 -04:00
parent 4367e3aeda
commit 42846e6ef1
7 changed files with 157 additions and 157 deletions
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6
Source/Core/Core/DSP/DSPTables.h
View File

@ -104,9 +104,9 @@ const char* pdregname(int val);
const char* pdregnamelong(int val); const char* pdregnamelong(int val);
void InitInstructionTable(); void InitInstructionTable();
void applyWriteBackLog(); void ApplyWriteBackLog();
void zeroWriteBackLog(); void ZeroWriteBackLog();
void zeroWriteBackLogPreserveAcc(u8 acc); void ZeroWriteBackLogPreserveAcc(u8 acc);
// Used by the assembler and disassembler for info retrieval. // Used by the assembler and disassembler for info retrieval.
const DSPOPCTemplate* FindOpInfoByOpcode(UDSPInstruction opcode); const DSPOPCTemplate* FindOpInfoByOpcode(UDSPInstruction opcode);

76
Source/Core/Core/DSP/Interpreter/DSPIntArithmetic.cpp
View File

@ -27,7 +27,7 @@ void clr(const UDSPInstruction opc)
dsp_set_long_acc(reg, 0); dsp_set_long_acc(reg, 0);
Update_SR_Register64(0); Update_SR_Register64(0);
zeroWriteBackLog(); ZeroWriteBackLog();
} }
// CLRL $acR.l // CLRL $acR.l
@ -40,7 +40,7 @@ void clrl(const UDSPInstruction opc)
u8 reg = (opc >> 8) & 0x1; u8 reg = (opc >> 8) & 0x1;
s64 acc = dsp_round_long_acc(dsp_get_long_acc(reg)); s64 acc = dsp_round_long_acc(dsp_get_long_acc(reg));
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(reg, acc); dsp_set_long_acc(reg, acc);
Update_SR_Register64(acc); Update_SR_Register64(acc);
@ -94,7 +94,7 @@ void tst(const UDSPInstruction opc)
s64 acc = dsp_get_long_acc(reg); s64 acc = dsp_get_long_acc(reg);
Update_SR_Register64(acc); Update_SR_Register64(acc);
zeroWriteBackLog(); ZeroWriteBackLog();
} }
// TSTAXH $axR.h // TSTAXH $axR.h
@ -108,7 +108,7 @@ void tstaxh(const UDSPInstruction opc)
s16 val = dsp_get_ax_h(reg); s16 val = dsp_get_ax_h(reg);
Update_SR_Register16(val); Update_SR_Register16(val);
zeroWriteBackLog(); ZeroWriteBackLog();
} }
//---- //----
@ -126,7 +126,7 @@ void cmp(const UDSPInstruction opc)
Update_SR_Register64(res, isCarry2(acc0, res), Update_SR_Register64(res, isCarry2(acc0, res),
isOverflow(acc0, -acc1, res)); // CF -> influence on ABS/0xa100 isOverflow(acc0, -acc1, res)); // CF -> influence on ABS/0xa100
zeroWriteBackLog(); ZeroWriteBackLog();
} }
// CMPAR $acS axR.h // CMPAR $acS axR.h
@ -146,7 +146,7 @@ void cmpar(const UDSPInstruction opc)
s64 res = dsp_convert_long_acc(sr - rr); s64 res = dsp_convert_long_acc(sr - rr);
Update_SR_Register64(res, isCarry2(sr, res), isOverflow(sr, -rr, res)); Update_SR_Register64(res, isCarry2(sr, res), isOverflow(sr, -rr, res));
zeroWriteBackLog(); ZeroWriteBackLog();
} }
// CMPI $amD, #I // CMPI $amD, #I
@ -202,7 +202,7 @@ void xorr(const UDSPInstruction opc)
u8 sreg = (opc >> 9) & 0x1; u8 sreg = (opc >> 9) & 0x1;
u16 accm = g_dsp.r.ac[dreg].m ^ g_dsp.r.ax[sreg].h; u16 accm = g_dsp.r.ac[dreg].m ^ g_dsp.r.ax[sreg].h;
zeroWriteBackLogPreserveAcc(dreg); ZeroWriteBackLogPreserveAcc(dreg);
g_dsp.r.ac[dreg].m = accm; g_dsp.r.ac[dreg].m = accm;
Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg))); Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
@ -221,7 +221,7 @@ void andr(const UDSPInstruction opc)
u8 sreg = (opc >> 9) & 0x1; u8 sreg = (opc >> 9) & 0x1;
u16 accm = g_dsp.r.ac[dreg].m & g_dsp.r.ax[sreg].h; u16 accm = g_dsp.r.ac[dreg].m & g_dsp.r.ax[sreg].h;
zeroWriteBackLogPreserveAcc(dreg); ZeroWriteBackLogPreserveAcc(dreg);
g_dsp.r.ac[dreg].m = accm; g_dsp.r.ac[dreg].m = accm;
Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg))); Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
@ -240,7 +240,7 @@ void orr(const UDSPInstruction opc)
u8 sreg = (opc >> 9) & 0x1; u8 sreg = (opc >> 9) & 0x1;
u16 accm = g_dsp.r.ac[dreg].m | g_dsp.r.ax[sreg].h; u16 accm = g_dsp.r.ac[dreg].m | g_dsp.r.ax[sreg].h;
zeroWriteBackLogPreserveAcc(dreg); ZeroWriteBackLogPreserveAcc(dreg);
g_dsp.r.ac[dreg].m = accm; g_dsp.r.ac[dreg].m = accm;
Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg))); Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
@ -258,7 +258,7 @@ void andc(const UDSPInstruction opc)
u8 dreg = (opc >> 8) & 0x1; u8 dreg = (opc >> 8) & 0x1;
u16 accm = g_dsp.r.ac[dreg].m & g_dsp.r.ac[1 - dreg].m; u16 accm = g_dsp.r.ac[dreg].m & g_dsp.r.ac[1 - dreg].m;
zeroWriteBackLogPreserveAcc(dreg); ZeroWriteBackLogPreserveAcc(dreg);
g_dsp.r.ac[dreg].m = accm; g_dsp.r.ac[dreg].m = accm;
Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg))); Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
@ -276,7 +276,7 @@ void orc(const UDSPInstruction opc)
u8 dreg = (opc >> 8) & 0x1; u8 dreg = (opc >> 8) & 0x1;
u16 accm = g_dsp.r.ac[dreg].m | g_dsp.r.ac[1 - dreg].m; u16 accm = g_dsp.r.ac[dreg].m | g_dsp.r.ac[1 - dreg].m;
zeroWriteBackLogPreserveAcc(dreg); ZeroWriteBackLogPreserveAcc(dreg);
g_dsp.r.ac[dreg].m = accm; g_dsp.r.ac[dreg].m = accm;
Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg))); Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
@ -293,7 +293,7 @@ void xorc(const UDSPInstruction opc)
u8 dreg = (opc >> 8) & 0x1; u8 dreg = (opc >> 8) & 0x1;
u16 accm = g_dsp.r.ac[dreg].m ^ g_dsp.r.ac[1 - dreg].m; u16 accm = g_dsp.r.ac[dreg].m ^ g_dsp.r.ac[1 - dreg].m;
zeroWriteBackLogPreserveAcc(dreg); ZeroWriteBackLogPreserveAcc(dreg);
g_dsp.r.ac[dreg].m = accm; g_dsp.r.ac[dreg].m = accm;
Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg))); Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
@ -310,7 +310,7 @@ void notc(const UDSPInstruction opc)
u8 dreg = (opc >> 8) & 0x1; u8 dreg = (opc >> 8) & 0x1;
u16 accm = g_dsp.r.ac[dreg].m ^ 0xffff; u16 accm = g_dsp.r.ac[dreg].m ^ 0xffff;
zeroWriteBackLogPreserveAcc(dreg); ZeroWriteBackLogPreserveAcc(dreg);
g_dsp.r.ac[dreg].m = accm; g_dsp.r.ac[dreg].m = accm;
Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg))); Update_SR_Register16((s16)accm, false, false, isOverS32(dsp_get_long_acc(dreg)));
@ -395,7 +395,7 @@ void addr(const UDSPInstruction opc)
ax <<= 16; ax <<= 16;
s64 res = acc + ax; s64 res = acc + ax;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -416,7 +416,7 @@ void addax(const UDSPInstruction opc)
s64 ax = dsp_get_long_acx(sreg); s64 ax = dsp_get_long_acx(sreg);
s64 res = acc + ax; s64 res = acc + ax;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -436,7 +436,7 @@ void add(const UDSPInstruction opc)
s64 acc1 = dsp_get_long_acc(1 - dreg); s64 acc1 = dsp_get_long_acc(1 - dreg);
s64 res = acc0 + acc1; s64 res = acc0 + acc1;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -456,7 +456,7 @@ void addp(const UDSPInstruction opc)
s64 prod = dsp_get_long_prod(); s64 prod = dsp_get_long_prod();
s64 res = acc + prod; s64 res = acc + prod;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -479,7 +479,7 @@ void addaxl(const UDSPInstruction opc)
u64 res = acc + acx; u64 res = acc + acx;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, (s64)res); dsp_set_long_acc(dreg, (s64)res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -538,7 +538,7 @@ void incm(const UDSPInstruction opc)
s64 acc = dsp_get_long_acc(dreg); s64 acc = dsp_get_long_acc(dreg);
s64 res = acc + sub; s64 res = acc + sub;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -557,7 +557,7 @@ void inc(const UDSPInstruction opc)
s64 acc = dsp_get_long_acc(dreg); s64 acc = dsp_get_long_acc(dreg);
s64 res = acc + 1; s64 res = acc + 1;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -597,7 +597,7 @@ void subr(const UDSPInstruction opc)
ax <<= 16; ax <<= 16;
s64 res = acc - ax; s64 res = acc - ax;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -618,7 +618,7 @@ void subax(const UDSPInstruction opc)
s64 acx = dsp_get_long_acx(sreg); s64 acx = dsp_get_long_acx(sreg);
s64 res = acc - acx; s64 res = acc - acx;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -638,7 +638,7 @@ void sub(const UDSPInstruction opc)
s64 acc2 = dsp_get_long_acc(1 - dreg); s64 acc2 = dsp_get_long_acc(1 - dreg);
s64 res = acc1 - acc2; s64 res = acc1 - acc2;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -658,7 +658,7 @@ void subp(const UDSPInstruction opc)
s64 prod = dsp_get_long_prod(); s64 prod = dsp_get_long_prod();
s64 res = acc - prod; s64 res = acc - prod;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -678,7 +678,7 @@ void decm(const UDSPInstruction opc)
s64 acc = dsp_get_long_acc(dreg); s64 acc = dsp_get_long_acc(dreg);
s64 res = acc - sub; s64 res = acc - sub;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -697,7 +697,7 @@ void dec(const UDSPInstruction opc)
s64 acc = dsp_get_long_acc(dreg); s64 acc = dsp_get_long_acc(dreg);
s64 res = acc - 1; s64 res = acc - 1;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -718,7 +718,7 @@ void neg(const UDSPInstruction opc)
s64 acc = dsp_get_long_acc(dreg); s64 acc = dsp_get_long_acc(dreg);
acc = 0 - acc; acc = 0 - acc;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, acc); dsp_set_long_acc(dreg, acc);
Update_SR_Register64(dsp_get_long_acc(dreg)); Update_SR_Register64(dsp_get_long_acc(dreg));
@ -738,7 +738,7 @@ void abs(const UDSPInstruction opc)
if (acc < 0) if (acc < 0)
acc = 0 - acc; acc = 0 - acc;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, acc); dsp_set_long_acc(dreg, acc);
Update_SR_Register64(dsp_get_long_acc(dreg)); Update_SR_Register64(dsp_get_long_acc(dreg));
@ -774,7 +774,7 @@ void movr(const UDSPInstruction opc)
ax <<= 16; ax <<= 16;
ax &= ~0xffff; ax &= ~0xffff;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(areg, ax); dsp_set_long_acc(areg, ax);
Update_SR_Register64(ax); Update_SR_Register64(ax);
@ -792,7 +792,7 @@ void movax(const UDSPInstruction opc)
s64 acx = dsp_get_long_acx(sreg); s64 acx = dsp_get_long_acx(sreg);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, acx); dsp_set_long_acc(dreg, acx);
Update_SR_Register64(acx); Update_SR_Register64(acx);
@ -808,7 +808,7 @@ void mov(const UDSPInstruction opc)
u8 dreg = (opc >> 8) & 0x1; u8 dreg = (opc >> 8) & 0x1;
u64 acc = dsp_get_long_acc(1 - dreg); u64 acc = dsp_get_long_acc(1 - dreg);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, acc); dsp_set_long_acc(dreg, acc);
Update_SR_Register64(acc); Update_SR_Register64(acc);
@ -828,7 +828,7 @@ void lsl16(const UDSPInstruction opc)
s64 acc = dsp_get_long_acc(areg); s64 acc = dsp_get_long_acc(areg);
acc <<= 16; acc <<= 16;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(areg, acc); dsp_set_long_acc(areg, acc);
Update_SR_Register64(dsp_get_long_acc(areg)); Update_SR_Register64(dsp_get_long_acc(areg));
@ -848,7 +848,7 @@ void lsr16(const UDSPInstruction opc)
0x000000FFFFFFFFFFULL; // Lop off the extraneous sign extension our 64-bit fake accum causes 0x000000FFFFFFFFFFULL; // Lop off the extraneous sign extension our 64-bit fake accum causes
acc >>= 16; acc >>= 16;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(areg, (s64)acc); dsp_set_long_acc(areg, (s64)acc);
Update_SR_Register64(dsp_get_long_acc(areg)); Update_SR_Register64(dsp_get_long_acc(areg));
@ -866,7 +866,7 @@ void asr16(const UDSPInstruction opc)
s64 acc = dsp_get_long_acc(areg); s64 acc = dsp_get_long_acc(areg);
acc >>= 16; acc >>= 16;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(areg, acc); dsp_set_long_acc(areg, acc);
Update_SR_Register64(dsp_get_long_acc(areg)); Update_SR_Register64(dsp_get_long_acc(areg));
@ -1052,7 +1052,7 @@ void lsrnrx(const UDSPInstruction opc)
acc >>= -shift; acc >>= -shift;
} }
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, (s64)acc); dsp_set_long_acc(dreg, (s64)acc);
Update_SR_Register64(dsp_get_long_acc(dreg)); Update_SR_Register64(dsp_get_long_acc(dreg));
@ -1089,7 +1089,7 @@ void asrnrx(const UDSPInstruction opc)
acc >>= -shift; acc >>= -shift;
} }
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, acc); dsp_set_long_acc(dreg, acc);
Update_SR_Register64(dsp_get_long_acc(dreg)); Update_SR_Register64(dsp_get_long_acc(dreg));
@ -1122,7 +1122,7 @@ void lsrnr(const UDSPInstruction opc)
else if (shift < 0) else if (shift < 0)
acc >>= -shift; acc >>= -shift;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, (s64)acc); dsp_set_long_acc(dreg, (s64)acc);
Update_SR_Register64(dsp_get_long_acc(dreg)); Update_SR_Register64(dsp_get_long_acc(dreg));
@ -1154,7 +1154,7 @@ void asrnr(const UDSPInstruction opc)
else if (shift < 0) else if (shift < 0)
acc >>= -shift; acc >>= -shift;
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, acc); dsp_set_long_acc(dreg, acc);
Update_SR_Register64(dsp_get_long_acc(dreg)); Update_SR_Register64(dsp_get_long_acc(dreg));

174
Source/Core/Core/DSP/Interpreter/DSPIntExtOps.cpp
View File

@ -24,7 +24,7 @@
namespace DSP namespace DSP
{ {
inline static void writeToBackLog(int i, int idx, u16 value) static void WriteToBackLog(int i, int idx, u16 value)
{ {
writeBackLog[i] = value; writeBackLog[i] = value;
writeBackLogIdx[i] = idx; writeBackLogIdx[i] = idx;
@ -45,7 +45,7 @@ static bool IsSameMemArea(u16 a, u16 b)
// Decrement addressing register $arR. // Decrement addressing register $arR.
void dr(const UDSPInstruction opc) void dr(const UDSPInstruction opc)
{ {
writeToBackLog(0, opc & 0x3, dsp_decrement_addr_reg(opc & 0x3)); WriteToBackLog(0, opc & 0x3, dsp_decrement_addr_reg(opc & 0x3));
} }
// IR $arR // IR $arR
@ -53,7 +53,7 @@ void dr(const UDSPInstruction opc)
// Increment addressing register $arR. // Increment addressing register $arR.
void ir(const UDSPInstruction opc) void ir(const UDSPInstruction opc)
{ {
writeToBackLog(0, opc & 0x3, dsp_increment_addr_reg(opc & 0x3)); WriteToBackLog(0, opc & 0x3, dsp_increment_addr_reg(opc & 0x3));
} }
// NR $arR // NR $arR
@ -63,7 +63,7 @@ void nr(const UDSPInstruction opc)
{ {
u8 reg = opc & 0x3; u8 reg = opc & 0x3;
writeToBackLog(0, reg, dsp_increase_addr_reg(reg, (s16)g_dsp.r.ix[reg])); WriteToBackLog(0, reg, dsp_increase_addr_reg(reg, (s16)g_dsp.r.ix[reg]));
} }
// MV $axD.D, $acS.S // MV $axD.D, $acS.S
@ -78,11 +78,11 @@ void mv(const UDSPInstruction opc)
{ {
case DSP_REG_ACL0: case DSP_REG_ACL0:
case DSP_REG_ACL1: case DSP_REG_ACL1:
writeToBackLog(0, dreg + DSP_REG_AXL0, g_dsp.r.ac[sreg - DSP_REG_ACL0].l); WriteToBackLog(0, dreg + DSP_REG_AXL0, g_dsp.r.ac[sreg - DSP_REG_ACL0].l);
break; break;
case DSP_REG_ACM0: case DSP_REG_ACM0:
case DSP_REG_ACM1: case DSP_REG_ACM1:
writeToBackLog(0, dreg + DSP_REG_AXL0, dsp_op_read_reg_and_saturate(sreg - DSP_REG_ACM0)); WriteToBackLog(0, dreg + DSP_REG_AXL0, dsp_op_read_reg_and_saturate(sreg - DSP_REG_ACM0));
break; break;
} }
} }
@ -107,7 +107,7 @@ void s(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[dreg], dsp_op_read_reg_and_saturate(sreg - DSP_REG_ACM0)); dsp_dmem_write(g_dsp.r.ar[dreg], dsp_op_read_reg_and_saturate(sreg - DSP_REG_ACM0));
break; break;
} }
writeToBackLog(0, dreg, dsp_increment_addr_reg(dreg)); WriteToBackLog(0, dreg, dsp_increment_addr_reg(dreg));
} }
// SN @$arD, $acS.S // SN @$arD, $acS.S
@ -130,7 +130,7 @@ void sn(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[dreg], dsp_op_read_reg_and_saturate(sreg - DSP_REG_ACM0)); dsp_dmem_write(g_dsp.r.ar[dreg], dsp_op_read_reg_and_saturate(sreg - DSP_REG_ACM0));
break; break;
} }
writeToBackLog(0, dreg, dsp_increase_addr_reg(dreg, (s16)g_dsp.r.ix[dreg])); WriteToBackLog(0, dreg, dsp_increase_addr_reg(dreg, (s16)g_dsp.r.ix[dreg]));
} }
// L $axD.D, @$arS // L $axD.D, @$arS
@ -145,15 +145,15 @@ void l(const UDSPInstruction opc)
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT)) if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT))
{ {
u16 val = dsp_dmem_read(g_dsp.r.ar[sreg]); u16 val = dsp_dmem_read(g_dsp.r.ar[sreg]);
writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000); WriteToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
writeToBackLog(1, dreg, val); WriteToBackLog(1, dreg, val);
writeToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0); WriteToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0);
writeToBackLog(3, sreg, dsp_increment_addr_reg(sreg)); WriteToBackLog(3, sreg, dsp_increment_addr_reg(sreg));
} }
else else
{ {
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[sreg]));
writeToBackLog(1, sreg, dsp_increment_addr_reg(sreg)); WriteToBackLog(1, sreg, dsp_increment_addr_reg(sreg));
} }
} }
@ -169,15 +169,15 @@ void ln(const UDSPInstruction opc)
if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT)) if ((dreg >= DSP_REG_ACM0) && (g_dsp.r.sr & SR_40_MODE_BIT))
{ {
u16 val = dsp_dmem_read(g_dsp.r.ar[sreg]); u16 val = dsp_dmem_read(g_dsp.r.ar[sreg]);
writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000); WriteToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
writeToBackLog(1, dreg, val); WriteToBackLog(1, dreg, val);
writeToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0); WriteToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0);
writeToBackLog(3, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg])); WriteToBackLog(3, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
} }
else else
{ {
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[sreg]));
writeToBackLog(1, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg])); WriteToBackLog(1, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
} }
} }
@ -193,9 +193,9 @@ void ls(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[3], dsp_op_read_reg_and_saturate(sreg)); dsp_dmem_write(g_dsp.r.ar[3], dsp_op_read_reg_and_saturate(sreg));
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[0])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[0]));
writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3)); WriteToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0)); WriteToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
} }
// LSN $axD.D, $acS.m // LSN $axD.D, $acS.m
@ -211,9 +211,9 @@ void lsn(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[3], dsp_op_read_reg_and_saturate(sreg)); dsp_dmem_write(g_dsp.r.ar[3], dsp_op_read_reg_and_saturate(sreg));
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[0])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[0]));
writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3)); WriteToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0])); WriteToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0]));
} }
// LSM $axD.D, $acS.m // LSM $axD.D, $acS.m
@ -229,9 +229,9 @@ void lsm(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[3], dsp_op_read_reg_and_saturate(sreg)); dsp_dmem_write(g_dsp.r.ar[3], dsp_op_read_reg_and_saturate(sreg));
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[0])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[0]));
writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3])); WriteToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0)); WriteToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
} }
// LSMN $axD.D, $acS.m // LSMN $axD.D, $acS.m
@ -248,9 +248,9 @@ void lsnm(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[3], dsp_op_read_reg_and_saturate(sreg)); dsp_dmem_write(g_dsp.r.ar[3], dsp_op_read_reg_and_saturate(sreg));
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[0])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[0]));
writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3])); WriteToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0])); WriteToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0]));
} }
// SL $acS.m, $axD.D // SL $acS.m, $axD.D
@ -265,9 +265,9 @@ void sl(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[0], dsp_op_read_reg_and_saturate(sreg)); dsp_dmem_write(g_dsp.r.ar[0], dsp_op_read_reg_and_saturate(sreg));
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3)); WriteToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0)); WriteToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
} }
// SLN $acS.m, $axD.D // SLN $acS.m, $axD.D
@ -283,9 +283,9 @@ void sln(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[0], dsp_op_read_reg_and_saturate(sreg)); dsp_dmem_write(g_dsp.r.ar[0], dsp_op_read_reg_and_saturate(sreg));
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3)); WriteToBackLog(1, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0])); WriteToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0]));
} }
// SLM $acS.m, $axD.D // SLM $acS.m, $axD.D
@ -301,9 +301,9 @@ void slm(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[0], dsp_op_read_reg_and_saturate(sreg)); dsp_dmem_write(g_dsp.r.ar[0], dsp_op_read_reg_and_saturate(sreg));
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3])); WriteToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
writeToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0)); WriteToBackLog(2, DSP_REG_AR0, dsp_increment_addr_reg(DSP_REG_AR0));
} }
// SLMN $acS.m, $axD.D // SLMN $acS.m, $axD.D
@ -319,9 +319,9 @@ void slnm(const UDSPInstruction opc)
dsp_dmem_write(g_dsp.r.ar[0], dsp_op_read_reg_and_saturate(sreg)); dsp_dmem_write(g_dsp.r.ar[0], dsp_op_read_reg_and_saturate(sreg));
writeToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(0, dreg, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3])); WriteToBackLog(1, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
writeToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0])); WriteToBackLog(2, DSP_REG_AR0, dsp_increase_addr_reg(DSP_REG_AR0, (s16)g_dsp.r.ix[0]));
} }
// LD $ax0.d, $ax1.r, @$arS // LD $ax0.d, $ax1.r, @$arS
@ -342,16 +342,16 @@ void ld(const UDSPInstruction opc)
u8 rreg = (opc >> 4) & 0x1; u8 rreg = (opc >> 4) & 0x1;
u8 sreg = opc & 0x3; u8 sreg = opc & 0x3;
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3])) if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg]));
else else
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(2, sreg, dsp_increment_addr_reg(sreg)); WriteToBackLog(2, sreg, dsp_increment_addr_reg(sreg));
writeToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3)); WriteToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
} }
// LDAX $axR, @$arS // LDAX $axR, @$arS
@ -361,16 +361,16 @@ void ldax(const UDSPInstruction opc)
u8 sreg = (opc >> 5) & 0x1; u8 sreg = (opc >> 5) & 0x1;
u8 rreg = (opc >> 4) & 0x1; u8 rreg = (opc >> 4) & 0x1;
writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[sreg]));
if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3])) if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
else else
writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(2, sreg, dsp_increment_addr_reg(sreg)); WriteToBackLog(2, sreg, dsp_increment_addr_reg(sreg));
writeToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3)); WriteToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
} }
// LDN $ax0.d, $ax1.r, @$arS // LDN $ax0.d, $ax1.r, @$arS
@ -381,16 +381,16 @@ void ldn(const UDSPInstruction opc)
u8 rreg = (opc >> 4) & 0x1; u8 rreg = (opc >> 4) & 0x1;
u8 sreg = opc & 0x3; u8 sreg = opc & 0x3;
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3])) if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg]));
else else
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(2, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg])); WriteToBackLog(2, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
writeToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3)); WriteToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
} }
// LDAXN $axR, @$arS // LDAXN $axR, @$arS
@ -400,16 +400,16 @@ void ldaxn(const UDSPInstruction opc)
u8 sreg = (opc >> 5) & 0x1; u8 sreg = (opc >> 5) & 0x1;
u8 rreg = (opc >> 4) & 0x1; u8 rreg = (opc >> 4) & 0x1;
writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[sreg]));
if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3])) if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
else else
writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(2, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg])); WriteToBackLog(2, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
writeToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3)); WriteToBackLog(3, DSP_REG_AR3, dsp_increment_addr_reg(DSP_REG_AR3));
} }
// LDM $ax0.d, $ax1.r, @$arS // LDM $ax0.d, $ax1.r, @$arS
@ -420,16 +420,16 @@ void ldm(const UDSPInstruction opc)
u8 rreg = (opc >> 4) & 0x1; u8 rreg = (opc >> 4) & 0x1;
u8 sreg = opc & 0x3; u8 sreg = opc & 0x3;
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3])) if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg]));
else else
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(2, sreg, dsp_increment_addr_reg(sreg)); WriteToBackLog(2, sreg, dsp_increment_addr_reg(sreg));
writeToBackLog(3, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3])); WriteToBackLog(3, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
} }
// LDAXM $axR, @$arS // LDAXM $axR, @$arS
@ -439,16 +439,16 @@ void ldaxm(const UDSPInstruction opc)
u8 sreg = (opc >> 5) & 0x1; u8 sreg = (opc >> 5) & 0x1;
u8 rreg = (opc >> 4) & 0x1; u8 rreg = (opc >> 4) & 0x1;
writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[sreg]));
if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3])) if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
else else
writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(2, sreg, dsp_increment_addr_reg(sreg)); WriteToBackLog(2, sreg, dsp_increment_addr_reg(sreg));
writeToBackLog(3, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3])); WriteToBackLog(3, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
} }
// LDNM $ax0.d, $ax1.r, @$arS // LDNM $ax0.d, $ax1.r, @$arS
@ -459,16 +459,16 @@ void ldnm(const UDSPInstruction opc)
u8 rreg = (opc >> 4) & 0x1; u8 rreg = (opc >> 4) & 0x1;
u8 sreg = opc & 0x3; u8 sreg = opc & 0x3;
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3])) if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[sreg]));
else else
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(1, (rreg << 1) + DSP_REG_AXL1, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(2, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg])); WriteToBackLog(2, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
writeToBackLog(3, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3])); WriteToBackLog(3, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
} }
// LDAXNM $axR, @$arS // LDAXNM $axR, @$arS
@ -478,16 +478,16 @@ void ldaxnm(const UDSPInstruction opc)
u8 sreg = (opc >> 5) & 0x1; u8 sreg = (opc >> 5) & 0x1;
u8 rreg = (opc >> 4) & 0x1; u8 rreg = (opc >> 4) & 0x1;
writeToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(0, rreg + DSP_REG_AXH0, dsp_dmem_read(g_dsp.r.ar[sreg]));
if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3])) if (IsSameMemArea(g_dsp.r.ar[sreg], g_dsp.r.ar[3]))
writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg])); WriteToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[sreg]));
else else
writeToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3])); WriteToBackLog(1, rreg + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r.ar[3]));
writeToBackLog(2, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg])); WriteToBackLog(2, sreg, dsp_increase_addr_reg(sreg, (s16)g_dsp.r.ix[sreg]));
writeToBackLog(3, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3])); WriteToBackLog(3, DSP_REG_AR3, dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r.ix[3]));
} }
void nop(const UDSPInstruction opc) void nop(const UDSPInstruction opc)
@ -505,7 +505,7 @@ void nop(const UDSPInstruction opc)
// The ext op are writing their output into the backlog which is // The ext op are writing their output into the backlog which is
// being applied to the real registers after the main op was executed // being applied to the real registers after the main op was executed
void applyWriteBackLog() void ApplyWriteBackLog()
{ {
// always make sure to have an extra entry at the end w/ -1 to avoid // always make sure to have an extra entry at the end w/ -1 to avoid
// infinitive loops // infinitive loops
@ -529,7 +529,7 @@ void applyWriteBackLog()
// right thing to do // right thing to do
// Only needed for cases when mainop and extended are modifying the same ACC // Only needed for cases when mainop and extended are modifying the same ACC
// Games are not doing that + in motorola (similar DSP) dox this is forbidden to do. // Games are not doing that + in motorola (similar DSP) dox this is forbidden to do.
void zeroWriteBackLog() void ZeroWriteBackLog()
{ {
#ifdef PRECISE_BACKLOG #ifdef PRECISE_BACKLOG
// always make sure to have an extra entry at the end w/ -1 to avoid // always make sure to have an extra entry at the end w/ -1 to avoid
@ -541,7 +541,7 @@ void zeroWriteBackLog()
#endif #endif
} }
void zeroWriteBackLogPreserveAcc(u8 acc) void ZeroWriteBackLogPreserveAcc(u8 acc)
{ {
#ifdef PRECISE_BACKLOG #ifdef PRECISE_BACKLOG
for (int i = 0; writeBackLogIdx[i] != -1; i++) for (int i = 0; writeBackLogIdx[i] != -1; i++)

4
Source/Core/Core/DSP/Interpreter/DSPIntMisc.cpp
View File

@ -67,7 +67,7 @@ void lris(const UDSPInstruction opc)
// an opcode extension but not do anything. At least according to duddie. // an opcode extension but not do anything. At least according to duddie.
void nx(const UDSPInstruction opc) void nx(const UDSPInstruction opc)
{ {
zeroWriteBackLog(); ZeroWriteBackLog();
} }
//---- //----
@ -134,7 +134,7 @@ void sbset(const UDSPInstruction opc)
// This is a bunch of flag setters, flipping bits in SR. // This is a bunch of flag setters, flipping bits in SR.
void srbith(const UDSPInstruction opc) void srbith(const UDSPInstruction opc)
{ {
zeroWriteBackLog(); ZeroWriteBackLog();
switch ((opc >> 8) & 0xf) switch ((opc >> 8) & 0xf)
{ {
case 0xa: // M2 case 0xa: // M2

50
Source/Core/Core/DSP/Interpreter/DSPIntMultiplier.cpp
View File

@ -82,7 +82,7 @@ s64 dsp_multiply_mulx(u8 axh0, u8 axh1, u16 val1, u16 val2)
// direct use of prod regs by AX/AXWII (look @that part of ucode). // direct use of prod regs by AX/AXWII (look @that part of ucode).
void clrp(const UDSPInstruction opc) void clrp(const UDSPInstruction opc)
{ {
zeroWriteBackLog(); ZeroWriteBackLog();
g_dsp.r.prod.l = 0x0000; g_dsp.r.prod.l = 0x0000;
g_dsp.r.prod.m = 0xfff0; g_dsp.r.prod.m = 0xfff0;
@ -99,7 +99,7 @@ void tstprod(const UDSPInstruction opc)
{ {
s64 prod = dsp_get_long_prod(); s64 prod = dsp_get_long_prod();
Update_SR_Register64(prod); Update_SR_Register64(prod);
zeroWriteBackLog(); ZeroWriteBackLog();
} }
//---- //----
@ -115,7 +115,7 @@ void movp(const UDSPInstruction opc)
s64 acc = dsp_get_long_prod(); s64 acc = dsp_get_long_prod();
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, acc); dsp_set_long_acc(dreg, acc);
Update_SR_Register64(acc); Update_SR_Register64(acc);
@ -133,7 +133,7 @@ void movnp(const UDSPInstruction opc)
s64 acc = -dsp_get_long_prod(); s64 acc = -dsp_get_long_prod();
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, acc); dsp_set_long_acc(dreg, acc);
Update_SR_Register64(acc); Update_SR_Register64(acc);
@ -151,7 +151,7 @@ void movpz(const UDSPInstruction opc)
s64 acc = dsp_get_long_prod_round_prodl(); s64 acc = dsp_get_long_prod_round_prodl();
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, acc); dsp_set_long_acc(dreg, acc);
Update_SR_Register64(acc); Update_SR_Register64(acc);
@ -174,7 +174,7 @@ void addpaxz(const UDSPInstruction opc)
s64 ax = dsp_get_long_acx(sreg); s64 ax = dsp_get_long_acx(sreg);
s64 res = prod + (ax & ~0xffff); s64 res = prod + (ax & ~0xffff);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_acc(dreg, res); dsp_set_long_acc(dreg, res);
res = dsp_get_long_acc(dreg); res = dsp_get_long_acc(dreg);
@ -190,7 +190,7 @@ void mulaxh(const UDSPInstruction opc)
{ {
s64 prod = dsp_multiply(dsp_get_ax_h(0), dsp_get_ax_h(0)); s64 prod = dsp_multiply(dsp_get_ax_h(0), dsp_get_ax_h(0));
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }
@ -209,7 +209,7 @@ void mul(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(sreg); u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply(axh, axl); s64 prod = dsp_multiply(axh, axl);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }
@ -231,7 +231,7 @@ void mulac(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(sreg); u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply(axl, axh); s64 prod = dsp_multiply(axl, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
dsp_set_long_acc(rreg, acc); dsp_set_long_acc(rreg, acc);
@ -255,7 +255,7 @@ void mulmv(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(sreg); u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply(axl, axh); s64 prod = dsp_multiply(axl, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
dsp_set_long_acc(rreg, acc); dsp_set_long_acc(rreg, acc);
@ -280,7 +280,7 @@ void mulmvz(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(sreg); u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply(axl, axh); s64 prod = dsp_multiply(axl, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
dsp_set_long_acc(rreg, acc); dsp_set_long_acc(rreg, acc);
@ -302,7 +302,7 @@ void mulx(const UDSPInstruction opc)
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1); u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2); s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }
@ -325,7 +325,7 @@ void mulxac(const UDSPInstruction opc)
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1); u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2); s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
dsp_set_long_acc(rreg, acc); dsp_set_long_acc(rreg, acc);
@ -350,7 +350,7 @@ void mulxmv(const UDSPInstruction opc)
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1); u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2); s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
dsp_set_long_acc(rreg, acc); dsp_set_long_acc(rreg, acc);
@ -376,7 +376,7 @@ void mulxmvz(const UDSPInstruction opc)
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1); u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2); s64 prod = dsp_multiply_mulx(sreg, treg, val1, val2);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
dsp_set_long_acc(rreg, acc); dsp_set_long_acc(rreg, acc);
@ -398,7 +398,7 @@ void mulc(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(treg); u16 axh = dsp_get_ax_h(treg);
s64 prod = dsp_multiply(accm, axh); s64 prod = dsp_multiply(accm, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }
@ -421,7 +421,7 @@ void mulcac(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(treg); u16 axh = dsp_get_ax_h(treg);
s64 prod = dsp_multiply(accm, axh); s64 prod = dsp_multiply(accm, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
dsp_set_long_acc(rreg, acc); dsp_set_long_acc(rreg, acc);
@ -447,7 +447,7 @@ void mulcmv(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(treg); u16 axh = dsp_get_ax_h(treg);
s64 prod = dsp_multiply(accm, axh); s64 prod = dsp_multiply(accm, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
dsp_set_long_acc(rreg, acc); dsp_set_long_acc(rreg, acc);
@ -474,7 +474,7 @@ void mulcmvz(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(treg); u16 axh = dsp_get_ax_h(treg);
s64 prod = dsp_multiply(accm, axh); s64 prod = dsp_multiply(accm, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
dsp_set_long_acc(rreg, acc); dsp_set_long_acc(rreg, acc);
@ -497,7 +497,7 @@ void maddx(const UDSPInstruction opc)
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1); u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
s64 prod = dsp_multiply_add(val1, val2); s64 prod = dsp_multiply_add(val1, val2);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }
@ -516,7 +516,7 @@ void msubx(const UDSPInstruction opc)
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1); u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
s64 prod = dsp_multiply_sub(val1, val2); s64 prod = dsp_multiply_sub(val1, val2);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }
@ -535,7 +535,7 @@ void maddc(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(treg); u16 axh = dsp_get_ax_h(treg);
s64 prod = dsp_multiply_add(accm, axh); s64 prod = dsp_multiply_add(accm, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }
@ -554,7 +554,7 @@ void msubc(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(treg); u16 axh = dsp_get_ax_h(treg);
s64 prod = dsp_multiply_sub(accm, axh); s64 prod = dsp_multiply_sub(accm, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }
@ -572,7 +572,7 @@ void madd(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(sreg); u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply_add(axl, axh); s64 prod = dsp_multiply_add(axl, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }
@ -590,7 +590,7 @@ void msub(const UDSPInstruction opc)
u16 axh = dsp_get_ax_h(sreg); u16 axh = dsp_get_ax_h(sreg);
s64 prod = dsp_multiply_sub(axl, axh); s64 prod = dsp_multiply_sub(axl, axh);
zeroWriteBackLog(); ZeroWriteBackLog();
dsp_set_long_prod(prod); dsp_set_long_prod(prod);
} }

2
Source/Core/Core/DSP/Interpreter/DSPInterpreter.cpp
View File

@ -33,7 +33,7 @@ void ExecuteInstruction(const UDSPInstruction inst)
if (opcode_template->extended) if (opcode_template->extended)
{ {
applyWriteBackLog(); ApplyWriteBackLog();
} }
} }
} // Anonymous namespace } // Anonymous namespace

2
Source/Core/Core/DSP/Jit/x64/DSPEmitter.cpp
View File

@ -198,7 +198,7 @@ void DSPEmitter::EmitInstruction(UDSPInstruction inst)
// need to call the online cleanup function because // need to call the online cleanup function because
// the writeBackLog gets populated at runtime // the writeBackLog gets populated at runtime
m_gpr.PushRegs(); m_gpr.PushRegs();
ABI_CallFunction(applyWriteBackLog); ABI_CallFunction(ApplyWriteBackLog);
m_gpr.PopRegs(); m_gpr.PopRegs();
} }
else else